AMD: 32nm issues fixed

[qcmadness]

AMD uses ASML whose 2nd gen immersion is equal to Nikons 1st gen immersion, it doesnt really mean anything.

Also, what has SOI actually gotten AMD? Has it reduced costs and improved performance? If it has improved performance, then why do they not perform as well as Intel?

Whats that mean?

SOI adds costs to production.
Although researches shows SOI's advantages diminish at around 45nm / 32nm, AMD could have probably design Bulldozer for bulk processes.

[Kuroimaho]

AMD/GLOFO: There are no 32nm issues!
AMD/GLOFO: Good news! we fixed out 32nm issues!

lol

go amd go, just a few more delays and your officially one entire node behind intel

lol.

But come on are you surprised ?

JF already told us on this very forum that bulldozer comes out on schedule... which was supposed to happen last summer.
Wouldn't trust anything what anyone from AMD says.

[saaya]

Our 32nm is healthy and it is ramping up to support our product launches next year," said Chekib Akrout, senior vice president of technology group at AMD, during the company's conference with financial analysts.
so where did xbit lad get his info on glofo's 32nm not being healthy ....

"We had been having slow kind of ramp of the yield curve [with 32nm SOI]. [...] I can tell you today that we are now [on the ramp take off part] of the yield curve. Our 32nm is healthy and it is ramping up to support our product launches next year," said Chekib Akrout, senior vice president of technology group at AMD

slow ramp of the yield curve = bad yields = issues... no?
IS healthy, IS ramping up... why would he mention it if it wasnt news, ie it wasnt looking that way earlier. this by itself wouldnt mean anything, but this plus yields were bad before...

Also, what has SOI actually gotten AMD?

good point, even amd mentioned that SOI wasnt really useful below 45nm iirc?

sooner or later amd catch up.
cant shrink forever.

hah! thats a good one

AMD's 45nm six-core X6 1090T@3.2GHz consumes 81.6 watt

Intel's 32nm six-core i7-980X@3.3GHz consumes 95.6 watt
http://www.lostcircuits.com/cpu/amd_thuban/powermax.gif

so it consumes 14W less, less than 13% less, and it does how much less work than the 980? 20%? 30%? 40% in some scenarios maybe?

@ saaya
Welcome to November 9 Analyst Day

:P
should it be @xbitlabs?

[saaya]

lol.

But come on are you surprised ?

JF already told us on this very forum that bulldozer comes out on schedule... which was supposed to happen last summer.
Wouldn't trust anything what anyone from AMD says.

best part is that it was originally supposed to come out in 2008 ^^
the 2011/2012 bd will be way different than the 2008 bd...
the 2008 bd is dead/canceled and we are getting the 2011/2012 bd instead...
those extra 2 years are enough to make it bd2, so lets hope we get bd2 and not bd1.1, 2 years late ^^

[kl0012]

so it consumes 14W less, less than 13% less, and it does how much less work than the 980? 20%? 30%? 40% in some scenarios maybe?

In fact 56%...

[qcmadness]

32nm SOI at AMD / GF is delayed.
I think the major reason is the spin-off of GF.

130nm SOI: Sep 2003
90nm SOI: Dec 2004
65nm SOI: Dec 2006
45nm SOI: Nov 2008
32nm SOI: Apr 2011 (?)

[Oliverda]

Pretty useless graph if you don't cross reference it with performance chart. i7-980X will destroy x6 1090T.

If you take a look at the first post then probably you will realize that we are talking about process technologies and not about computing performance.



"The transistor drive current for AMD's 45-nm devices is much lower than that of the Intel HKMG transistors. But power consumption is quickly becoming a high priority for server chips. AMD's transistors exhibit very low channel leakage. Our transistor benchmarks indicates that leakage current is less than one-third of the value measured on AMD's 65-nm process. It's also significantly lower than the Intel 45-nm HKMG process. In fact the Ion/Ioff ratio for AMD's PFET is nearly 10 times better than that for the Intel PFET. "

source

[informal]

best part is that it was originally supposed to come out in 2008 ^^
the 2011/2012 bd will be way different than the 2008 bd...
the 2008 bd is dead/canceled and we are getting the 2011/2012 bd instead...
those extra 2 years are enough to make it bd2, so lets hope we get bd2 and not bd1.1, 2 years late ^^

That's true,the 2011 Bulldozer is a reworked 2008 design.But the good thing about BD is AMD's ability to gradually improve this design as we saw in the Analyst Day presentation.We practically get the tick-tock model from AMD,with tocks not necessarily tied in to node transitions since the module design allows AMD to pack more cores into same die area and after that improve those cores(BD enhanced/BD Next Gen coming 1 and 2 years after first BD comes in Q2). BD version 2011 will be around 10-35% faster than Stars cores gen ,per core and per clock ,with much higher clock potential and 33% more cores to start with. This alone should put AMD in very competitive position,apart from the previously mentioned part about compact core/module design and modularity/scalability of BD design.

:P
should it be @xbitlabs?

Yeah it should be(too),but you should know better than to quote them without checking the primary source which is Analyst Day .

[kl0012]

If you take a look at the first post then probably you will realize that we are talking about process technologies and not about computing performance.

computing performance is a function of a process technology. Having bleeding edge technology is allowing you to have much higher perf at the same power... or much lower power at the same perf...

[Chrono Detector]

I just wish AMD would release Bulldozer and 32nm CPU's right now.

[Kuroimaho]

best part is that it was originally supposed to come out in 2008 ^^
the 2011/2012 bd will be way different than the 2008 bd...
the 2008 bd is dead/canceled and we are getting the 2011/2012 bd instead...
those extra 2 years are enough to make it bd2, so lets hope we get bd2 and not bd1.1, 2 years late ^^

It was fishy from the start, they announced it 2 weeks before the release of K10. That was quite strange, but knowing that K10 didn't deliver, I guess they made this announcement to keep the stock up as Mubdala bought them in 3 months after this. Or maybe it was a show for Mubdala to keep their spirits up.

The SSE5 specification, which is being made available to the developer community today at http://developer.amd.com/SSE5, will be implemented in products based on AMD’s next-generation “Bulldozer” core, available in 2009. Link

No SSE5, not socket compatible, not 2009, well at least the name remains.

But at least now we know the non existing problems of 32nm are fixed so we just have to wait a little more.

[duploxxx]

http://www.xbitlabs.com/news/cpu/dis...re_Behind.html



AMD/GLOFO: There are no 32nm issues!
AMD/GLOFO: Good news! we fixed out 32nm issues!

lol

go amd go, just a few more delays and your officially one entire node behind intel

yeah so it seems like they had some startup issues and therefore Liano is delayed, but BD server and BD desktop is on track even earlier for desktop, where will be the most ASP?

It was fishy from the start, they announced it 2 weeks before the release of K10. That was quite strange, but knowing that K10 didn't deliver, I guess they made this announcement to keep the stock up as Mubdala bought them in 3 months after this. Or maybe it was a show for Mubdala to keep their spirits up.



No SSE5, not socket compatible, not 2009, well at least the name remains.

But at least now we know the non existing problems of 32nm are fixed so we just have to wait a little more.

sometimes they have to make a decision. new arch + new node + new socket ain't always that smart, they probably learn from Barcelona. btw MC was a perfect answer on intel's more advanced node and architecture.

[Nintendork]

Pretty useless graph if you don't cross reference it with performance chart. i7-980X will destroy x6 1090T.

30% advantage on average, 4.5 times the price, 29% smaller node. Even with 32nm I don't it as a very efficient chip.

Then X6 1055T 95w @3.6Ghz consumes less than 1090T at stock speeds.

[zalbard]

well let us see how it performs before judgment.

This. And I'd like to see yields also... Remember how many times TSMC fixed their 40nm tech?

[JF-AMD]

Thats cut and paste pr for any company when talking to the money people, things could be going to hell in a handbasket and companies would still pitch the good story, any company.

Actually, quite the opposite. You open up your company, and potentially yourself, when you make claims in public that could be material to the company's financial position.

There were guys at enron that did that. Told the world that everything was great while the company was tanking. They are in jail now.

That is why I am extremely careful about what I say. Even though I am posting on my own, everything is a physical record on the internet. You only say things that you know are true. You never knowingly say something that is not true because there is a real danger for you.

[JF-AMD]

lol.

But come on are you surprised ?

JF already told us on this very forum that bulldozer comes out on schedule... which was supposed to happen last summer.
Wouldn't trust anything what anyone from AMD says.

That was 45nm bulldozer. That project was stopped because the product would have been uncompetitive.

32nm Bulldozer was never planned for last year.

[Nikolasz]

Im start to be confused how amd name cpus.
In back years we all know athlon 64

[JF-AMD]

It was fishy from the start, they announced it 2 weeks before the release of K10. That was quite strange, but knowing that K10 didn't deliver, I guess they made this announcement to keep the stock up as Mubdala bought them in 3 months after this. Or maybe it was a show for Mubdala to keep their spirits up.



No SSE5, not socket compatible, not 2009, well at least the name remains.

But at least now we know the non existing problems of 32nm are fixed so we just have to wait a little more.

SSE5 was proposed ahead of intel. They decided for AVX, which was essentially a subset of SSE5.

In order to maintain binary compatibility we opted to join into the AVX instructions vs. forcing customers to have 2 different code sets.

The remaining SSE5 instructions are going to be implemented in Bulldozer in the form of FMA4 and XOP.

So, AVX + XOP + FMA4 essentially equals SSE5. So we are still delivering it, but doing it in a way that prevents a major fork in the codebase.

[Aberration]

LOL


different architecture plays a huge role in performance



ohh and ultraviolet is another different lithography tech wich will start to see its use soon ... 22nm and beyond

Architecure playing a huge role is exactly my point. Does AMD need SOI to help their product be competative?

Oh and ultraviolet is what we have been using for lithography for a very long time. Lithographic scanners use KrF excimer lasers of 248nm, and ArF of 193nm. I-line 365nm, from a mercury arc lamp, has been in use for much longer.

Maybe you mean EUV? Which is extreme UV. Problem is the cost of ownership for EUV is showing to be far too much.

Which is why immersion emerged. Immersion increases the NA, which increases the sigma, which increases the resolution.

And even with that it may take Intel up to 4 exposures for a single pattern, drastically increasing the cost of production.

We are going to need leap in lithography technology here soon.

[Oliverda]

SOI adds costs to production.
Although researches shows SOI's advantages diminish at around 45nm / 32nm, AMD could have probably design Bulldozer for bulk processes.

Could you show us some evidence for this?


Btw there are some rumours that the SOI will be crucial under 22nm for everybody including Intel as well.

[Chumbucket843]

At 22nm Intel will also use SOI and HKMG so AMD will be at a disadvantage.

that was a rumor based off of what an analyst said. most do no not agree with him either.

It'll be interesting silicon since it'll be 32nm SOI HKMG.

aside from the substrate there is very little Si at all actually. that's probably where the manufacturing troubles were coming from.

i wish that global foundries would actually publish something on their processes but i'm not expecting them to. until then their processes will remain fairly boring, at least from my perspective.

SSE5 was proposed ahead of intel. They decided for AVX, which was essentially a subset of SSE5.

In order to maintain binary compatibility we opted to join into the AVX instructions vs. forcing customers to have 2 different code sets.

The remaining SSE5 instructions are going to be implemented in Bulldozer in the form of FMA4 and XOP.

So, AVX + XOP + FMA4 essentially equals SSE5. So we are still delivering it, but doing it in a way that prevents a major fork in the codebase.

in no way is AVX a subset of SSE5. AVX is a much more radical departure from SSE.

i am not sure if you are familiar with assembly but hopefully you can see how different they are. notice how they arent even using the same registers.
http://developer.amd.com/cpu/SSE5/Pages/default.aspx
http://software.intel.com/en-us/arti...ons-intel-avx/

Architecure playing a huge role is exactly my point. Does AMD need SOI to help their product be competative?

Oh and ultraviolet is what we have been using for lithography for a very long time. Lithographic scanners use KrF excimer lasers of 248nm, and ArF of 193nm. I-line 365nm, from a mercury arc lamp, has been in use for much longer.

Maybe you mean EUV? Which is extreme UV. Problem is the cost of ownership for EUV is showing to be far too much.

Which is why immersion emerged. Immersion increases the NA, which increases the sigma, which increases the resolution.

And even with that it may take Intel up to 4 exposures for a single pattern, drastically increasing the cost of production.

We are going to need leap in lithography technology here soon.

i agree that we need a new approach to litho but increasing NA isnt entirely a good thing. depth of focus will become extremely shallow and requires very flat wafers. there are plenty of RET's but i dont see them keeping costs at a decent level.

maybe e-beam might provide better scaling. i dont know much about it but i already see huge issues with speed. with one or even several beams and billions of exponentially increasing etchings the beams must do will take a long time.

[Chumbucket843]

Could you show us some evidence for this?


Btw there are some rumours that the SOI will be crucial under 22nm for everybody including Intel as well.

the answer is fairly simple. the problems that SOI fixes are not the major problems at sub 45nm.

i will give SOI credit where it is due: it looks nice for finfets. other than that i dont care for it.

[Sn0wm@n]

Architecure playing a huge role is exactly my point. Does AMD need SOI to help their product be competative?

Oh and ultraviolet is what we have been using for lithography for a very long time. Lithographic scanners use KrF excimer lasers of 248nm, and ArF of 193nm. I-line 365nm, from a mercury arc lamp, has been in use for much longer.

Maybe you mean EUV? Which is extreme UV. Problem is the cost of ownership for EUV is showing to be far too much.

Which is why immersion emerged. Immersion increases the NA, which increases the sigma, which increases the resolution.

And even with that it may take Intel up to 4 exposures for a single pattern, drastically increasing the cost of production.

We are going to need leap in lithography technology here soon.

yes i did meant euv


ohhh and btw where does transistor make an architecture better then the other one ???


transistors are just that .... its how you lay em out that you create logic ... and certain layout are better ... but the transistors didnt play that huge of a role like you seem to think

[Aberration]

i agree that we need a new approach to litho but increasing NA isnt entirely a good thing. depth of focus will become extremely shallow and requires very flat wafers. there are plenty of RET's but i dont see them keeping costs at a decent level.

maybe e-beam might provide better scaling. i dont know much about it but i already see huge issues with speed. with one or even several beams and billions of exponentially increasing etchings the beams must do will take a long time.

Immersion increases the NA and DOF. And RET technology does not really add that much cost to the over all system.

I do not think e-beam will ever be very viable for mass device production.

[Aberration]

yes i did meant euv


ohhh and btw where does transistor make an architecture better then the other one ???


transistors are just that .... its how you lay em out that you create logic ... and certain layout are better ... but the transistors didnt play that huge of a role like you seem to think

Of course transistor design plays a huge role. There are all sorts of different transistors for different applications, and different type of transistors being developed all the time.