Quote Originally Posted by Kuroimaho View Post
It was fishy from the start, they announced it 2 weeks before the release of K10. That was quite strange, but knowing that K10 didn't deliver, I guess they made this announcement to keep the stock up as Mubdala bought them in 3 months after this. Or maybe it was a show for Mubdala to keep their spirits up.



No SSE5, not socket compatible, not 2009, well at least the name remains.

But at least now we know the non existing problems of 32nm are fixed so we just have to wait a little more.
SSE5 was proposed ahead of intel. They decided for AVX, which was essentially a subset of SSE5.

In order to maintain binary compatibility we opted to join into the AVX instructions vs. forcing customers to have 2 different code sets.

The remaining SSE5 instructions are going to be implemented in Bulldozer in the form of FMA4 and XOP.

So, AVX + XOP + FMA4 essentially equals SSE5. So we are still delivering it, but doing it in a way that prevents a major fork in the codebase.