AMD Ontario APU pictured,die size ~77mm^2

[kl0012]

Even if it had, say, 8 decoders it wouldn't be any faster. It could in theory run at 12.8 "GIPS", but in practice it wouldn't run any faster(only in cases it would actually exploit ILP > 2, which I believe is quite rare with the given code).

But haters gonna hate.

But if your cpu has only two decoders it doesn't mean that it has an equal IPC to cpu with 4 decoders when executes code with ILP <= 2. A simple example (code with sequence of 4 arithmetic operations):
a = b + c
a = a + d
e = g + h
e = e + f
Cpu with 4 decoders can execute first and third instructions in the same cycle, while cpu with 2 decoders will need one more cycle for that. Of cause in reality things are a bit more complex because of OutOfOrder buffer but again, i really doubt bobcat has bigger OOO instruction window then Conroe/Athlon64.