AMD Ontario APU pictured,die size ~77mm^2

[STEvil]

Now I wonder... As I remember P-3 Coppermine was up to 30% faster the Katmai having only half cache size of Katmai (but at full speed). And Tualatin (512Kb) has increased the perf. by another 10-20%...

iirc there were some pretty significant core differences between Coppermine and Katmai as well, so you cant attribute the full performance difference only to the L2 design.

[kl0012]

And with this half clock L2 Bobcat is supposed to be on par with Core based Pentium's we have today.

Well... You are funny man...

iirc there were some pretty significant core differences between Coppermine and Katmai as well, so you cant attribute the full performance difference only to the L2 design.

There were additional improvents (such as better instruction stalls handle) but the perf improvements was mostly from faster cache.

[informal]

Well... You are funny man...

There were additional improvents (such as better instruction stalls handle) but the perf improvements was mostly from faster cache.

Nope,that's just a quote from the hw-info's article(translated here):

We could bring AMD to make a statement about the performance: the Zacate APU should be appreciably faster than an Intel Core-based Pentium dual core, but no comparison was given to the coming Intel Sandy Bridge, as AMD has Llano, their second APU ready for that.

[Hans de Vries]

Forgot to add you can clearly see a line across the core "almost in the middle" and the same is present on the floor plan, now if you look at L2 you again can see the line whos first block is created smaller than the second one same as in the floor plan.

Correct.

(The floorplan is actually oriented like this: )




Regards, Hans

[RaV[666]]

We could bring AMD to make a statement about the performance: the Zacate APU should be appreciably faster than an Intel Core-based Pentium dual core, but no comparison was given to the coming Intel Sandy Bridge, as AMD has Llano, their second APU ready for that.

Thats a not precise statement.They could mean overall performance, like combining cpu + igp performance.If they would get similar to core performance, it would mean that one bobcat core is pretty much equivalent to a athlon II core, which really is a stretch.We could hope, but in reality it is meant to bury atom, not core.
I hope im wrong tho, it would be fantastic.
And again, we know that liano on the cpu side, will be weak compared to sandy bridge, however, if you take into consideration overall gpu + cpu performance it makes sense as a competitor.
If bobcat core would be so powerfull, liano wouldnt make much sense, it would be better off with 4 bobcat cores(similar performance,lower size).

[kl0012]

Nope,that's just a quote from the hw-info's article(translated here):

May be Zacate APU (in other words IGP) will be faster then Pentium IGP (no objection here). But not a single chance it will be faster cpu core wise. lets wait and see if it is faster then atom.

[kl0012]

Correct.

(The floorplan is actually oriented like this: )


Regards, Hans

Or it can be another fotoshoped picture...

[LightSpeed]

If Bobcat is even close to Core, Llano will make no sense

Im sure he talked CPU + GPU. Bobcat might as well be much faster than Atom (likely) with both the CPU + GPU, but Core? That seems a mighty stretch

[informal]

May be Zacate APU (in other words IGP) will be faster then Pentium IGP (no objection here). But not a single chance it will be faster cpu core wise. lets wait and see if it is faster then atom.

If it's faster than Atom? There is no "if",only how big the gap will be. And Core based Pentiums,IMO, is not Westmere+IGP but Penryn based ULV platform. This is in line with "90% of mainstream performance in half the die area" statement AMD made for Bobcat cores(not the whole Ontario APU). 90% of mainstream is 90% of Propus/Regor which pretty much equals Penryn 3M.

[LightSpeed]

Or it can be another fotoshoped picture...

Seriously, stop threadcrapping.

AMD themselves supplied the slides at HotChips. If they chopped, theyd let us know they did.

[Hornet331]

Seriously, stop threadcrapping.

AMD themselves supplied the slides at HotChips. If they chopped, theyd let us know they did.

No thread crapping going on here... JF themself said that AMD chops the pictures, for several reasons.

@topic

Interesting and the size is quite impressive, now I want to see some numbers.

[kl0012]

If it's faster than Atom? There is no "if",only how big the gap will be. And Core based Pentiums,IMO, is not Westmere+IGP but Penryn based ULV platform. This is in line with "90% of mainstream performance in half the die area" statement AMD made for Bobcat cores(not the whole Ontario APU). 90% of mainstream is 90% of Propus/Regor which pretty much equals Penryn 3M.

You made to many assumption here. Based on what we know about bobcat architecture, it should be in range of athlon64 perf.
Lets see.
Bobcat:
2 decoders, 2 ALU+2 AGU (max 4 uops per cycle), 64-bit fpu (max up to 2 uops ).
Athlon64:
3 decoders, 3 ALU/AGU (max up to 6 uops per cycle) 64-bit fpu (max up to 3 uops per cycle).

[ubuntu83]

No thread crapping going on here... JF themself said that AMD chops the pictures, for several reasons.

@topic

Interesting and the size is quite impressive, now I want to see some numbers.

Bulldozer is quite some time away from release. Ontario is not very far from release probably it's going to get released this year.

[mAJORD]

No thread crapping going on here... JF themself said that AMD chops the pictures, for several reasons.

@topic

Interesting and the size is quite impressive, now I want to see some numbers.

Yes, but clearly they're not concerned in regards to Bobcat..they've laid out the various units within the uarch in the previous slides. Being fully synthesised and all, it's not like it means much anyway.
I do find it odd they've 'covered up' the cores in the full dieshot, but the shapes at least line up perfectly, but at the end of the day, for the purpose of the discussion, it's pretty clear the cores ~5mm2.

Regarding Llano.. it's clearly going to be considerably faster even IF the uarch has inferior perf/watt to Bobcat, as it's going to operate at much higher frequencies.
It's a totally different situation, being on GloFo's 32nm SOI process. Bobcat is Synthesised, designed to easily slot into a generic process like TMSC's, Llano is not, and seemingly Bulldozer is not either going by the "photoshopped' dieshots.

[Hornet331]

Yes, but clearly they're not concerned in regards to Bobcat..they've laid out the various units within the uarch in the previous slides. Being fully synthesised and all, it's not like it means much anyway.
I do find it odd they've 'covered up' the cores in the full dieshot, but the shapes at least line up perfectly, but at the end of the day, for the purpose of the discussion, it's pretty clear the cores ~5mm2.

Imho that die shot looks like its one of the lower layers, cause you dont see any logic at all.

Even if it was fully synthesised, you at least would see some L1 cache blocks, but you dont.

[informal]

You made to many assumption here. Based on what we know about bobcat architecture, it should be in range of athlon64 perf.
Lets see.
Bobcat:
2 decoders, 2 ALU+2 AGU (max 4 uops per cycle), 64-bit fpu (max up to 2 uops ).
Athlon64:
3 decoders, 3 ALU/AGU (max up to 6 uops per cycle) 64-bit fpu (max up to 3 uops per cycle).

If only the number of decoders would tell the whole performance story, it would be easy.You can say that Bulldozer is almost equal to Bobcat then and on the A64 level of performance.Which is of course ridiculous.

[superrugal]

Imho that die shot looks like its one of the lower layers, cause you dont see any logic at all.

Even if it was fully synthesised, you at least would see some L1 cache blocks, but you dont.

I have doubted this before, cuz the core-part is looked like a cache.
But when I go over the preview of Ontario APU being held in June, found that the die-size on the wafer is nearly the same as today's clear die image, about 75mm^2.

So if this nowaday die-shot is Photoshoped, I guess it has used some cache blocks image to cover the core-logic. Although I seriously think whether there is any reason to do so.

[Mechanical Man]

So if this nowaday die-shot is Photoshoped, I guess it has used some cache blocks image to cover the core-logic. Although I seriously think whether there is any reason to do so.

I think there read somewhere that it was not logic layer but somekind of wirelayer, as wires are connected to logic they should reveal lot of shape of actual logic. Dont know aboout chip manufacturing enough to know for sure.

[kl0012]

If only the number of decoders would tell the whole performance story, it would be easy.You can say that Bulldozer is almost equal to Bobcat then and on the A64 level of performance.Which is of course ridiculous.

And what do you think can tell the whole perf story? It has less pipelines, less execution resources, slower cache, only single channel memory and based on its size it has probably smaller ooo buffers, smaller uop reservation station and smaller register renaming files (relative to athlon64). You dont really expect that it will be faster then pentium (penryn/westhmere based) just because AMD said "90% of mainstream performance". Do you?

[Chumbucket843]

There are different SRAM cells for different purposes (high density/low speed, high current/high speed, single ported, dual ported e.t.c). Not sure if you compared the same.

well duh. intel has no low speed SRAM cell for their 45nm HP node. just look at a shmoo of the atom.

in fact if you really want the truth, the bit-cell area is .3816um2 for the L2. this is to improve SER and performance. also the columns are very short to improve yields but at the cost of area.

[informal]

And what do you think can tell the whole perf story? It has less pipelines, less execution resources, slower cache, only single channel memory and based on its size it has probably smaller ooo buffers, smaller uop reservation station and smaller register renaming files (relative to athlon64). You dont really expect that it will be faster then pentium (penryn/westhmere based) just because AMD said "90% of mainstream performance". Do you?

I don't expect anything,I just quoted the hw-info article.And AMD stated the 90% of mainstream performance while mainstream in their pricelist is Regor(and Regor pretty much matches Penryn 3M).You can draw your own conclusions.

PS The Bobcat core is also new from the ground up design(not based on K8/10h),has more OoO capabilities than 10h and shares some functionality that is in BD.

[Chumbucket843]

Imho that die shot looks like its one of the lower layers, cause you dont see any logic at all.

Even if it was fully synthesised, you at least would see some L1 cache blocks, but you dont.

you mean upper. the next layer up has the solder bumps.

and you can see circuits at that level, it just depends on the angle that you look at it.

[kl0012]

I don't expect anything,I just quoted the hw-info article.And AMD stated the 90% of mainstream performance while mainstream in their pricelist is Regor(and Regor pretty much matches Penryn 3M).You can draw your own conclusions.

PS The Bobcat core is also new from the ground up design(not based on K8/10h),has more OoO capabilities than 10h and shares some functionality that is in BD.

I would not draw conclusions from anything AMD said. Otherwise we will end up with threads like this:
http://www.xtremesystems.org/forums/...arcelona+40%25
I prefer to wait and see. But till now nothing actually points that bobcat would be equal or faster then athlon64 (not to say penryn 3M).

[informal]

We already have BOINC benchmark results for Bobcat A0,they are in line(+-5%) with Athlon II working at ~1.4-1.6Ghz.So this is not the same as Barcelona "claim"(which applied to some server workloads).

[richierich]

I would not draw conclusions from anything AMD said. Otherwise we will end up with threads like this:
http://www.xtremesystems.org/forums/...arcelona+40%25
I prefer to wait and see. But till now nothing actually points that bobcat would be equal or faster then athlon64 (not to say penryn 3M).

That was back then under different management. Do you really think AMD could afford to be embarrassed yet again? And as informal has already mentioned, BOINC stats show somewhat promising performance. We have to see power consumption #s, though.