Quote Originally Posted by madcho View Post
i would think a module it's 160% if it loss 20%, i think it's on 2 cores the loss.

But the advantage is single thread way much faster than tuban, i think. One core ( so one thread ) can run code on the 256bits AVX FP. It's not faster with 2 threads on one module for FP, but the advantage, is less threaded FP code will be faster.

Int should be faster too in ipc even pipe is deeper. As JF- said, PII was 1.5+1.5, BD ( ² ? ) is 2+2. ( ALU+AGU ).

I think it's a good deal. JF- said this week we are going to know what about BD work in 4 threads on 4 modules. Will be auto on 2 modules and 2 modules off or 4 modules on ?
Huh ? K10 has 3 ALUs and 3 AGUs, BD has 2+2. Contrary to what informal&co were hipping around, BD's integer cores are simpler and less powerful than on K10. Which is no surprise, something had to give in order to keep a module size under control.

All the improvements done together with the frequency increase are meant to compensate the 3rd unit. You have the information in the AMD slide ( ...without significant loss on the serial single-threaded workloads components ), you also have the comments of M. Alsup ( ...and
loose a little architectural figure (5%-ish) of merit due to the
microarchitecture ). It all fits together now, irrespective of what marketing is trying to portray.

Without significant loss = loose (5%-ish )

AMD is giving up single threaded performance and is focusing on through-output. They've realize it is pointless to try and compete with Intel on "fat" cores ( already in commercial benchmarks they need a 2-to-1 ratio to stay competitive with Xeons ) so the alternative path they are taking is to cram as many cores as possible in a given die size and clock those simple cores as high as possible.

Magny Cours isn't adequate for this since the core size is still too big and the core advantage over Xeons at the same process node is too small. With MC, AMD had a 50% advantage in the number of cores. With BD they will have 60% ( and much higher frequency ) over same timeframe Xeon and this will only increase in the future.