Quote Originally Posted by informal View Post
There is no free lunch.While intel invested in R&D and upped the transistor count per core(SMT and other improvements) ,AMD used the tweaked 10h core and upped the core count.2 different strategies,each has pros and cons. Either you invest in core logic and have larger and faster (IPC) cores,or you invest in smaller cores but cram more of them inside a chip. AMD will do similar thing intel did,next year with BD modules,upping the IPC and core count at the same time though.
Actually, if you're talking about BD "cores", not modules of 2 cores, the ipc and power will likely go down a little, as the core count goes up.

Think of it like:

Take K10 core. Now *share* the L1 and L2 and decode with a second core. (lower performance, but you get lower power). The FP is about the same (vs K10), double the width, but shared between the 2 cores. FMA will help some apps, clearly. But in general, I expect each core will have decreased IPC, power and area vs a K10 core, but they'll try to put more of them on a chip than with K10.