Dresdenboys' blog: AMD Bulldozer - Patent based research

[Chumbucket843]

http://www.google.com/patents?id=Ndr...page&q&f=false
back on topic...

this is basically how BD works.

[god_43]

http://www.google.com/patents?id=Ndr...page&q&f=false
back on topic...

this is basically how BD works.

ok i am not as good as other ppl at this but, i am i right in assuming that on that graph there are only 2 alu's and 2 agu's? also what is an lsu? am i right in understanding that an agu accesses stuff from memory?

Mr informal I'm kinda tempted to bet $50 bucks that this person above won't get a X6.

Gosh trolls.

And to the quoted person: grow up or you know, don't let the door hit you on the way out when/if you get banhammered.

[Chumbucket843]

ok i am not as good as other ppl at this but, i am i right in assuming that on that graph there are only 2 alu's and 2 agu's? also what is an lsu? am i right in understanding that an agu accesses stuff from memory?

an LSU is a load store unit. it basically reads and writes values to memory(this can be main memory or cache). it gets addresses from the AGU (address generation unit). they can have more alu's and agu's in each "cluster". its just a matter of implementation and most likely there will be more than one. they have a few pages of different tricks they can do with this uarch. it seems pretty cool.