Exactly. The low-k dielectrics prove to really help quite a bit in low rc wire delay and less leakage power(a strong point for Thuban turbo mode implementation!). Practically what AMD achieved with Thuban (same power envelope or better-140W 965BE- while adding 50% more cores along with Turbo Core ability) almost equals intels 45->32nm transition since intel added 50% more cores and more cache and stayed roughly in the same power envelope of 130W the older QC top of the line bloomfiled chip at the same clock had! The difference is that intel expanded L3 cache in Westmere design ,but their cache is inclusive and they just didn't want to go lower with cache/core ratio when compared to Bloomfield. AMD's L3 cache is exclusive spill over cache and increasing it over 6MBs for 6 core chip wouldn't make much difference.




. The low-k dielectrics prove to really help quite a bit in low rc wire delay and less leakage power(a strong point for Thuban turbo mode implementation!). Practically what AMD achieved with Thuban (same power envelope or better-140W 965BE- while adding 50% more cores along with Turbo Core ability) almost equals intels 45->32nm transition since intel added 50% more cores and more cache and stayed roughly in the same power envelope of 130W the older QC top of the line bloomfiled chip at the same clock had! The difference is that intel expanded L3 cache in Westmere design ,but their cache is inclusive and they just didn't want to go lower with cache/core ratio when compared to Bloomfield. AMD's L3 cache is exclusive spill over cache and increasing it over 6MBs for 6 core chip wouldn't make much difference.

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