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Since there is only one fetch and decode units per module, are there any chance it could use all ALUs for a Single Thread ?
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I've no idea what you're talking about with your 'different versions of SB'. Where did you get that information from?
AMD using more silicon to fight Intel? I'm not so sure about that, I wouldn't be surprised if a BD module was smaller than a SB core.
They could theoretically do that, but I don't think they will as it is very very hard to get more instruction parallelism out of a single thread and you would hardly gain any performance (for single threaded loads) by using all 8 INT execution units for a single thread.
Last edited by Helmore; 01-28-2010 at 01:18 PM.
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The original Sandy bridge was canceled and a new project was started.
Core was designed by Intel Israel. By 2005 Core was nearing completion and the uarch guys moved on to the next big thing : Gesher, later called Sandy Bridge.
Usually a CPU design takes 4 years at Intel : 1 is uarch, 2 is implementation , 1 is validation.While Intel Israel was thinking how Gesher will look like, Intel Oregon was busy implementing Nehalem.
But something happened : Gesher is cancelled 1 year after it started and work start all over again. Same team, same project , different name : Sandy Bridge.
Why did they give up the original ? Aimed too low, too complex, wrong path, too small of an improvement over Nehalem ? Who knows. AMD was busy defining K10 at the time, I don't remember hearing of Bulldozer in 2006.
Either way, Sandy Bridge and more likely Ivy Bridge should be just as revolutionary as Core, if Intel Israel wants to live up to the reputation they've earned.
SB is beefed up Nehalem,you can clearly see this from intel's disclosed info from past IDF's.The "big" change is AVX,but unfortunately no FMA support in SB. Other poster is implying that intel is reworking current SB core to make it better for BD time...
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no, intel has a prety big slide show on avx. i have it downloaded but i cant refind that link but its somewhere on idf. i dont understand why people are hyping FMA. it is backwards for performance. if you want more accuracy use fp64.
Brush up on your English please. There is a whole lot of info on SB topic from last few IDFs,they even had SB class MPU demoed and running... Inform yourself before making a fool of yourself next time please![]()
So you know nothing about the uarch itself. Note the should in Anand's article. Thanks for confirming it![]()
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Oh boy... There is even a diagram of uarch. straight from intel,posted in this very thread. Again,read up before making a fool of yourself.
To help you out,here it is again:
Evolution of Nehalem/Wesmere gen,nothing revolutionary(unless one considers AVX as revolutionary).
Last edited by informal; 01-28-2010 at 05:27 PM.
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oh...i see who are Intel fans here....
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I don't think they think the same way as you do.
They don't live with their reputation. They just plain human who make a living in Intel.
Don't make this kind of statement that sounds like Intel Israel engineers/researchers are people who do this for glory please.
Without a lucrative benefits, the reputation is just BS
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Depends what you mean under word "revolutionary". If SB keeps Nehalem's macro-architecture but also will be faster then Nehalem by (lets say) 30% on the same freq, would you call it revolutionary? Or if Bulldozer having very different marchitecture then Phenom, will show very similar performance, would you call it revolutionary? And, yes, Netburst was revolutionary and that fact did not help it to gain popularity. After all the implementation decides...
30%? Let's wait and see when it comes to percentages ,Nehalem is on average ~20% over Penryn and it had a whole host of improvements (SMT,IMC,QPI,Turbo...). SB has AVX and some relatively minor uarch tweaks to accompany it,no "big" things as those that Nehalem brought. And you expect 30% over Nehalem...
Of course you can't accurately predict the outcome based on the diagram,but you can get a idea where intel is going(and it's going after evolution of Core design,again).Remember it was you who started to throw out the bs percantage numbers.
AMD on the other hand is saying farewell to Hound/Hammer and is going after throughput computing with accent on perf/watt/mm2 with the shared design methodology.I would really like to see the sizes of BD module and SB core compared side by side.
I've never heard about "E" stepping K10. Maybe the Thuban will come with "E" stepping. E0 or E2.AMD Family 10h (DR-Ax/Bx, RB-Cx, BL-Cx, DA-Cx, HY-Dx, PH-Ex):
- AM2r2/AM3: Athlon/Sempron (Lima, Sargas), Athlon II/Neo (Kuma, Regor, Rana, Propus), Phenom II/Neo (Agena, Deneb, Callisto, Heka, Toliman), TWKR Black Edition
- Fr2/Fr4: Opteron (Barcelona, Shanghai, Suzuka, Budapest, Istanbul)
- G34: Opteron 61xx (Magny Cours)
- S1g3/g4: Turion II/Ultra, Athlon II, Phenom II
- ASB2: Athlon II Neo K, Turion II Neo K
AMD Family 11h (LG-Ax/Bx): S1g2: Sempron SI/NI/X2, Athlon QI/QL (Sable), Turion X2 Ultra/RM (Griffin)
AMD Family 12h (FS1)
AMD Family 15h: Bulldozer
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