hmmm... this has already been done. nano is an example where the cpu supports every intel sse instruction but the code path is chosen based on cpuid, not the actual capabilities.
http://arstechnica.com/hardware/revi...o-review.ars/6
![]()
hmmm... this has already been done. nano is an example where the cpu supports every intel sse instruction but the code path is chosen based on cpuid, not the actual capabilities.
http://arstechnica.com/hardware/revi...o-review.ars/6
![]()
Bookmarks