How to set up GTL Ref Values for 45nm & 65nm

[sheri]

Hi,

Could anyone tell me how GTL 0/2, 1/3 and Nb GTL are named in EP45 DS5.

I've got:
-CPU Reference (0.63x def.)
-CPU Reference2 (0.66x def.)
-MCH Reference (NB reference- am I right?) (0.63x def.)

-MCH/Dram Reference (connected with ram termination, which i don't change)
-Dram Channel A & B reference (connected with ram termination, which i don't change)


I'm asking 'cause i'm playing with first three voltages and i can't gain stable 4Ghz with PDC E6300 on 400 FSB with x10 multiplier.

Thanks !