HD5870 and HD5850 Reviews

[Lightman]

Cache increase is due to ALU increase.
There was a slide showing ~10% IPC increase with the ALUs.
Interpolation is being done on the shaders now.
The better AF algorithms come at a supposed no performance impact.

Regarding caches - yes, but not only.

However with twice as many SIMDs, there comes a need to feed these additional SIMDs, and to do something with their products. To achieve this, the 4 L2 caches have been doubled from 64KB to 128KB. These large L2 caches can now feed data to L1 caches at 435GB/sec, up from 384GB/sec in RV770. Along with this the global data share has been quadrupled to 64KB. /Anandtech/

4 L2 caches stayed from RV770, capacity doubled. Each L2 is for 64bit of mem, bus. So that cache now can be managed more flexibly because it's twice as big. Similar thing to doubling shared L3 cache on CPU. Some code will execute faster because it will have more data available (like in case of single threaded task).

Very good point with interpolation moved to shader core. For some games this will be perf. improver and for other it might be slight bottleneck.