Enter the Dragon: AMD AM3 6-core desktop arriving in 2010

[LaMpiR]

I thought Fusion was Bulldozer + GPU on the same silicon ...
I missed something

Here you go:
http://sites.amd.com/us/fusion/Pages/index.aspx

[ajaidev]

Since it is not clear yet if this thing supports DDR2 memory I don't understand what you are speaking about. What about AM2/AM2+ and DDR2 owners? Probably only owners of new AM3 boards will benefit from this cpu. It's like to say that 775 supports nice upgrade path - Celeron => Pentium => Core 2 Duo => Core 2 Quad.

AM2+ mobo that have split power planes will support x6. Your lineup actually is what is better in AMD than Intel.

AMD goes x1>x2>x3>x4>x6 "Maybe even x5 who know" AM3/AM2 split power planes
Intel goes x1>x2>x4>Noting "LGA775"

AMD has more choice and as noted the Phenom II's perform very well. Most likely AMD will intro a new socket in 2011 with intro of bulldozer but most likely so will Intel with sandy bridge. So what about LGA775 well its dead. AM2+ with split power planes/AM3 gives you more future prospects.

Also AMD uses the same socket for the high end, low end and low end and intel uses three "1366,1156 and 775". Intel has no plans to intro six core mid end processors in 1156 so that means no future prospects except getting either a i9+1366 or waiting for sandy bridge. If this is based on Istanbul "which it most likely is" they can use DDR2

[duploxxx]

Since it is not clear yet if this thing supports DDR2 memory I don't understand what you are speaking about. What about AM2/AM2+ and DDR2 owners? Probably only owners of new AM3 boards will benefit from this cpu. It's like to say that 775 supports nice upgrade path - Celeron => Pentium => Core 2 Duo => Core 2 Quad.

yes perhaps try that with all the available vrm support lists....
or did you also forget that you have both ddr2 and ddr3 775 boards... so are you comparing boards or cpu's and combining which on what????

on some am2 and all am2+ boards you can still use all ddr2 sempron/athlon/phenom versions + the ddr2/ddr3 combo's now and perhaps the 6 core.

if this 6 core is based on the current istanbul then it can also have the same dual mem controller just like current deneb offerings, there is no info that it would only be ddr3, stop speculations!

[kl0012]

AM2+ mobo that have split power planes will support x6. Your lineup actually is what is better in AMD than Intel.

AMD goes x1>x2>x3>x4>x6 "Maybe even x5 who know" AM3/AM2 split power planes
Intel goes x1>x2>x4>Noting "LGA775"

No, my 775 lineup was actually sarcasm. I don't believe in backward compability. Neither for AMD, nor in Intel. Even in spite of the fact that my lucky P5B-E motherboard already saw 3 different CPUs. But thats always lottery and many S754 and AM2 owners can say you that. Except that it is worth to replace motherboards sometimes not just for CPUs, but for new features.

AMD has more choice and as noted the Phenom II's perform very well. Most likely AMD will intro a new socket in 2011 with intro of bulldozer but most likely so will Intel with sandy bridge. So what about LGA775 well its dead. AM2+ with split power planes/AM3 gives you more future prospects.

Also AMD uses the same socket for the high end, low end and low end and intel uses three "1366,1156 and 775". Intel has no plans to intro six core mid end processors in 1156 so that means no future prospects except getting either a i9+1366 or waiting for sandy bridge. If this is based on Istanbul "which it most likely is" they can use DDR2

If we put aside all new features comming in the next months (such as SATA3and USB3) which can alone justify mboard replacement, I really don't see motivation to use 6-core with DDR2 which can turn into bottleneck for many cores CPUs. After all AMD CPUs has less advanced mem prefetch/disambiguous technologes then Intel's Core.

yes perhaps try that with all the available vrm support lists....
or did you also forget that you have both ddr2 and ddr3 775 boards... so are you comparing boards or cpu's and combining which on what????

on some am2 and all am2+ boards you can still use all ddr2 sempron/athlon/phenom versions + the ddr2/ddr3 combo's now and perhaps the 6 core.

if this 6 core is based on the current istanbul then it can also have the same dual mem controller just like current deneb offerings, there is no info that it would only be ddr3, stop speculations!

Sorry it is not me who started speculations.

[gosh]

I really don't see motivation to use 6-core with DDR2 which can turn into bottleneck for many cores CPUs. After all AMD CPUs has less advanced mem prefetch/disambiguous technologes then Intel's Core.

6 MB L3 cache does make i hard to see the difference between DDR2 and DDR3.

Applications that use much memory will probably get less performance with prefetch technology.

[mk_dir]

Since it is not clear yet if this thing supports DDR2 memory I don't understand what you are speaking about. What about

Indeed,Thuban core suposed to be a desktop variation of Lisbon (Opteron equivalent), so the IMC is exclusively DDR3, so no DDR2 support, and at the end, no socket AM2/AM2+ compatibility.

[Smartidiot89]

Indeed,Thuban core suposed to be a desktop variation of Lisbon (Opteron equivalent), so the IMC is exclusively DDR3, so no DDR2 support, and at the end, no socket AM2/AM2+ compatibility.

Give me a source to that.

For all we know it could support DDR2 and DDR3, or just DDR3 but there is no proof to it.

[Shadov]

Indeed,Thuban core suposed to be a desktop variation of Lisbon (Opteron equivalent), so the IMC is exclusively DDR3, so no DDR2 support, and at the end, no socket AM2/AM2+ compatibility.

Interesting indeed, though:

Barcelona -> Phenom
Shanghai -> Phenom II
Istanbul -> Phenom II X6

Why should AMD take a different approach?

[mk_dir]

Well, just look at the Istambul specs, it uses an only DDR2 IMC, due to backward compatibility... AMD claims to have full DDR3 support for Opteron systems with his new platform (new C32/G34 sockets on 2010, the Fiorano chipsets SR5890 + SP5100 still on DDR2 memory) and Lisbon processor is the six-core update for this new platform.

Now we know Lisbon situation, we can read this:

If Thuban exists, it could be a derivative of not Istanbul, but Lisbon, AMD's next-gen six-core offering.

Link.

So my conclusion is, Thuban's IMC -> DDR3.

[Smartidiot89]

Well, just look at the Istambul specs, it uses an only DDR2 IMC, due to backward compatibility... AMD claims to have full DDR3 support for Opteron systems with his new platform (new C32/G34 sockets, the Fiorano chipsets SR5890 + SP5100 still on DDR2 memory) and Lisbon processor is the six-core update for this new platform.

Now we know Lisbon situation, we can read this:

Link.

So my conclusion is, Thuban's IMC -> DDR3.

Fyi Istanbul is the same as Phenom II x4 920/940 in the IMC situation. DDR3 support is there, present on the die but it is disabled.

It will be the very same with Lisbon except Lisbon won't be able to fit into any socket with DDR2 so therefor it is DDR3 only. So DDR2 and support for current AM2+ 790FX motherboard is very likely.

[kl0012]

6 MB L3 cache does make i hard to see the difference between DDR2 and DDR3.

Applications that use much memory will probably get less performance with prefetch technology.

1 MB per core? It's not funy at all. After all you don't buy such cpu for single thread performance. If I remember it correctly, AMD estimation for specfp was 38% more performance for 50% more cores.
Also even bigger cache can't help to apps with streaming data. We can look at benchmarks from techreport:

100% perf diff going from Athlon II X2 250 to Phenom II 940
90% perf diff going from QX9770 to dual QX9775
41% perf diff going from Ph II x3 720 to Ph II x4 920... hmmm...

38% perf diff going from Opteron 2384 (2.7) to 2435 (2.6) with 3% diff in freq.

[Shadov]

1 MB per core? It's not funy at all. After all you don't buy such cpu for single thread performance. If I remember it correctly, AMD estimation for specfp was 38% more performance for 50% more cores.
Also even bigger cache can't help to apps with streaming data. We can look at benchmarks from techreport:

Including pass 1 charts for a better picture?

[kl0012]

Including pass 1 charts for a better picture?

Pass 1 doesn't scales lineary with number of cores.
In fact worst scalability of pass 1 and possible bottleneck of DDR2 doesn't help to Istanbul:

[ajaidev]

1 MB per core? It's not funy at all. After all you don't buy such cpu for single thread performance. If I remember it correctly, AMD estimation for specfp was 38% more performance for 50% more cores.
Also even bigger cache can't help to apps with streaming data. We can look at benchmarks from techreport:

100% perf diff going from Athlon II X2 250 to Phenom II 940
90% perf diff going from QX9770 to dual QX9775
41% perf diff going from Ph II x3 720 to Ph II x4 920... hmmm...

38% perf diff going from Opteron 2384 (2.7) to 2435 (2.6) with 3% diff in freq.

How can you compare 2435 to 2384 or x3 720 to a x4 920???

Oh and fyi the 12mb huge cache in a i9, well you do know that even SMT's eat cache so 12 threads means amm yes 1 mb per thread, now thats funny.

Forgot to add total cache the AMD hex core has is around 9 MB and total cache that a i9 has is around 13 MB, that is a 4 MB difference. Added to this how much 6 virtual threads also need cache.

[kl0012]

How can you 2435 to 2384 or x3 720 to a x4 920???

And what is an actual difference? Only number of cores (and frequency in case of opterons)

Oh and fyi the 12mb huge cache in a i9, well you do know that even SMT's eat cache so 12 threads means amm yes 1 mb per thread, now thats funny.

Let's not forget 3-channel DDR3, better prefetchers and memory disambiguation (which is missing in Phenom).

[gosh]

1 MB per core? It's not funy at all. After all you don't buy such cpu for single thread performance. If I remember it correctly, AMD estimation for specfp was 38% more performance for 50% more cores.
Also even bigger cache can't help to apps with streaming data. We can look at benchmarks from techreport:

How is it compiled?
How does the code look like?

Reading one byte on each read compared to read 8 byte each read, and you will se huge differences. Align reads for cache lines (the size for each line) will improve speed.
Or why not SSE2 optimize it.

You just can't take one test and say "this is how fast it is". bad code isn't fast.

L3 cache is shared among cores.

[gosh]

Forgot to add total cache the AMD hex core has is around 9 MB and total cache that a i9 has is around 13 MB, that is a 4 MB difference. Added to this how much 6 virtual threads also need cache.

Cache on Intel is inclusive, data is mirrored among cache levels. That means no more cache then 12 MB.
AMD has exclusive cache, data isn't mirrored among cache levels. L1 + L2 + L3 = total cache size

AMD also has 48 way L3 cache versus i7 (i9) 16 way L3 cache. i7 evicts data soner because when memory is mapped agains cache each address on i7 have 16 different places to be stored at. On AMD it has 48

[mk_dir]

Fyi Istanbul is the same as Phenom II x4 920/940 in the IMC situation. DDR3 support is there, present on the die but it is disabled.

It will be the very same with Lisbon except Lisbon won't be able to fit into any socket with DDR2 so therefor it is DDR3 only. So DDR2 and support for current AM2+ 790FX motherboard is very likely.

Maybe you're right, but in this point we're talking about Lisbon, not Istanbul (BTW,are you sure this core's IMC has support for DDR3?, Istambul can't use DDR3 in any system, so it's useless).

If the new cores for C32/G34 use exclusively DDR3 memory, why you would need a dual IMC? in the same way as why you would need DDR3 on Istambul processsor... Maybe dual IMC on the desktop variaton only? Sounds improbably for me

I will glad to see a dual IMC on Thuban, but, Lisbon -> DDR3 so...

[kl0012]

How is it compiled?
How does the code look like?

Thet was an old AMD's diagram before Istanbul release.
There is something new now:

Reading one byte on each read compared to read 8 byte each read, and you will se huge differences. Align reads for cache lines (the size for each line) will improve speed.
Or why not SSE2 optimize it.

I did not argue about whose cache is better. 1 MB per core simple is too small considering bottleneked bandwidth and week prefetch mechnism. Funny but it was long-term claim that AMD doesn't need prefetchers and big caches because of the integrated mem controller. But even IMC can be bottlenek if its bandwidth is too small to feed all cores.

L3 cache is shared among cores.

I know it. But, as I said, you don't buy such CPU for single threaded performance.

[gosh]

I did not argue about whose cache is better. 1 MB per core simple is too small considering bottleneked bandwidth and week prefetch mechnism.

Could you please explain how prefetch makes things faster on a CPU that has good bandwidth and low(er) latency running applications that use much memory?

Don't you think that polluting the cache and increase load between memory and cpu could make things worse?

[Smartidiot89]

Maybe you're right, but in this point we're talking about Lisbon, not Istanbul (BTW,are you sure this core's IMC has support for DDR3?, Istambul can't use DDR3 in any system, so it's useless).

If the new cores for C32/G34 use exclusively DDR3 memory, why you would need a dual IMC? in the same way as why you would need DDR3 on Istambul processsor... Maybe dual IMC on the desktop variaton only? Sounds improbably for me

I will glad to see a dual IMC on Thuban, but, Lisbon -> DDR3 so...

100% Istanbul has DDR3 but it is disabled cause AMD didn't see a need to validate it since there are no DDR3 socket F platforms and never will be. My source for this is the serverguy John Freuhe

Lisbon is Istanbul with a few tweaks, I am pretty sure it will have DDR2 support disabled/not validated since there won't be C32/G34 platforms with DDR2 modules. I am very much confident that "Thuban" would have both DDR2 and DDR3 that is afterall AMDs big sellingpoint.

[ajaidev]

Maybe you're right, but in this point we're talking about Lisbon, not Istanbul (BTW,are you sure this core's IMC has support for DDR3?, Istambul can't use DDR3 in any system, so it's useless).

If the new cores for C32/G34 use exclusively DDR3 memory, why you would need a dual IMC? in the same way as why you would need DDR3 on Istambul processsor... Maybe dual IMC on the desktop variaton only? Sounds improbably for me

I will glad to see a dual IMC on Thuban, but, Lisbon -> DDR3 so...

i am sure that Smartidiot is correct. I also did read that the DDR3 part is just disabled but is there, where as Lisbon does not have the part.

The desktop part is not suppose to come with C32 socket. The desktop new socket may come with Bulldozer but not a 6 core same arc. processor

[saaya]

AM2+ mobo that have split power planes will support x6. Your lineup actually is what is better in AMD than Intel.

AMD goes x1>x2>x3>x4>x6 "Maybe even x5 who know" AM3/AM2 split power planes
Intel goes x1>x2>x4>Noting "LGA775"

AMD has more choice and as noted the Phenom II's perform very well. Most likely AMD will intro a new socket in 2011 with intro of bulldozer but most likely so will Intel with sandy bridge. So what about LGA775 well its dead. AM2+ with split power planes/AM3 gives you more future prospects.

Also AMD uses the same socket for the high end, low end and low end and intel uses three "1366,1156 and 775". Intel has no plans to intro six core mid end processors in 1156 so that means no future prospects except getting either a i9+1366 or waiting for sandy bridge. If this is based on Istanbul "which it most likely is" they can use DDR2

so this 6x cpu will still support ddr2? that would be pretty sweet... makes am2 look like not that bad of a platform after all... though its probably am2+ right?

the original am2 was such a joke... i wish they would have stayed on 939 and then moved to am3 with ddr2 and an included upgrade path to ddr3 already on the same socket in slumber...

[kl0012]

Could you please explain how prefetch makes things faster on a CPU that has good bandwidth and low(er) latency running applications that use much memory?

Latencies of L1/L2/L3 always better then memory latency. Don't you prefer to find your data in cache instead of memory when you need it?

Don't you think that polluting the cache and increase load between memory and cpu could make things worse?

Of cause prefetchers aren't helpfull for application with low mem locality (such as data bases) but from the begining I've spoke about streaming apps which requires high mem bandwidth (majority of such apps have high mem locality).

[mk_dir]

i am sure that Smartidiot is correct. I also did read that the DDR3 part is just disabled but is there, where as Lisbon does not have the part.

The desktop part is not suppose to come with C32 socket. The desktop new socket may come with Bulldozer but not a 6 core same arc. processor

You convinced me guys, so it's possible a dual IMC on Thuban, that's nice

The socket question it's clear, this processor gonna use desktop socket AM3 (C32 only for single/dual processor server motherboards, G34 for multisocket server tier), the new desktop socket shouldn't come until Orichi, a Bulldozer's arch core.