Just to add, Sun has their UltraSPARC T2 Processor specs HERE. Notice, 8-threads per core, 2 instruction pipelines + 1 floating point unit + 1 stream processing unit (cryptographic). In Dresdenboy's diagram, I see 4 instruction pipelines. Given the differences between SPARC and x86, AMD may very well be getting 4 threads out of a core (welcome to the 21st century, AMD).
If anything, we can at least expect 4 instructions per cycle like Intel's Core 2 and Nehalem, up from K10's 3.
Originally Posted by phelan1777
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