Retail Q9650 Overclocking Thread

[CryptiK]

I don't want to derail the thread any further than you do. Sorry, but you seem to have started a rumor and I'm just doing a public service to try and clear the rumor from spreading any further.

I'll say this one more time: There's simply no correlation of such VID range to the 'functional limits' (or your claimed 'safety range') whatsoever throughout the quoted datasheet. You obviously chose to believe there exists such correlation, but you have failed to offer any factual proof to back up your personal belief.

Sure, the data sheet does not outright state "the functional limits are x.xx - x.xx v", but it is plainly inferred by first giving a maximum and minimum vid range. As I said before, a max and min range defines the functional limits of something. They then state the absolute max value which lies above the max vid range.

I can see where you are coming from though, but I feel it's of no use to split hairs over an apparent lack direct clarification.

You just did. And it's quite worthless when a bunch of people enjoy exchanging rumors so much it might even form a superstition at some point.


I do not have my own set of voltage values for that. I will know when I see Intel clearly specify the range.


What makes you decide what I believe? Well get this: I believe in cold hard facts and nothing else. Oh wait, does it just show how you automatically decided for Intel's undefined 'functional limits' in the same baseless way?


I don't prejudice whether it is a hard value above or below 1.3625v, as it could well be a dynamic range chip to chip, just like VID. If you really want to find out, ask Intel and let us know. But I suspect Intel would just give you a very conservative answer for their business interests.


Intel doesn't specify down a set of hard values, or explain clearly how they define or formulate their 'functional limits' on C2Qs in the datasheet. That much of fact is what I know and my only opinion for now. Though, I do hate rumor makers who enjoy fabricating things with unproven belief.

No one's "enjoying spreading rumors" there's no need to get overly personal. Through my questions I was trying to get you to explain what the situation here really is, but it appears you aren't able to, and that you will criticize others for giving someone a rough guideline, as it's not perfectly accurate, but you can't offer a better explanation or guideline yourself.

I was trying to avoid getting quite technical, but I'll have to. From my understanding of the data sheet it appears that there is no absolute maximum functional limit regarding vcc that applies to all processors. However, 1.3625v is a generally accepted 'safe' maximum (and that is a very generous maximum, in fact much higher than what appear to be the functional Vcc limits of the processors when under load), and that's all someone reading my initial post should take away.

The guideline (Figure 1, Page 20, Electrical Specifications) defines the static and transient load tolerance of the E8000 series processors. When we consider Vcc, typically we are referring to the static load (The transients are spikes created when during load to idle and idle to load transitions, as well as during variations in load. These transients should also of course be considered, but I'll leave that out for simplicities sake).

The figure explanation states "Adherence to this loadline specification is required to ensure reliable processor operation", so in my opinion, the figure is describing the 'functional limits' regarding Vcc. It shows that max vcc (V) = VID - 0.xxx v at various Icc (A) levels. This figure shows that the max Vcc is really the processor VID at 0A load, and the processor VID - ~0.105v at 75A load. That is assuming a standard operating speed.

Basically the lower the processor VID, the lower the maximum Vcc.

However we have no way of measuring how many watts or amps our processors are drawing at any given time, we can just roughly approximate it.

In summary, from the information in the data sheet, it appears that intel define the 'functional limits' regarding Vcc of the processors in the figure I referred to.

From that, my opinion is that to be within 'functional limits' of Vcc, the Vcc must not exceed the processor VID at 0A load, and must droop to VID - ~1.05v at 75A load. This very roughly means at idle, a processor should not see a Vcc greater than its VID, and at a 75A load, should not be exposed to a Vcc greater than VID - ~0.105v.

That's what it appears to mean to me, anyway.