X48 Rampage Formula Preview.

[Alien Grey]

It's the skew that makes it fail with the G.SKILL F2-9600CL5D-4GBPI.
With finer skew adjustments it's going to be possible to have it stable with higher DDR speeds and this memory.

I've got my stable clocks back at 3.6GHz and DDR 1199MHz with tRD 6.

Here are my settings for BIOS 0902.

Ai Overclock Tuner [Manual]
CPU Ratio Setting [8.0]
FSB Strap to North Bridge [400MHz]
FSB Frequency [450MHz]
PCIE Frequency [100MHz]
DRAM Frequency [1199MHz]
DRAM Command Rate [2N]
DRAM CLK Skew on Channel A/B [Auto]
DRAM Timing Control [Auto]
DRAM Static Read Control [Enabled]
Ai Clock Twister [Moderate]
Ai Transaction Booster [Manual]
Common Performance Level [06]
Pull-In of CH A/B all disabled
CPU Voltage [1.32500V]
CPU PLL Voltage [1.50V]
North Bridge Voltage [1.35V]
DRAM Voltage [1.80V]
FSB Termination Voltage [1.24V]
South Bridge Voltage [1.05V]
SB 1.5V Voltage [1.50V]
Loadline Calibration [Disabled]
CPU GTL Voltage Reference [0.63X]
NB GTL Voltage Reference [0.67X]
DRAM Controller Voltage REF [Auto]
DRAM Channel A/B Voltage REF [Auto]
CPU Spread Spectrum [Disabled]
PCIE Spread Spectrum [Disabled]
CPU Clock Skew [Delay 200ps]
NB Clock Skew [Delay 100ps]

CPU Ratio Setting [8.0]
C1E Support [Disabled]
CPU TM Function [Enabled]
Vanderpool Technology [Disabled]
Execute Disable Bit [Enabled]
Max CPUID Value Limit [Disabled]

LinX stable for 25 passes with BIOS 0902.



All we need now is smaller skew steps in the BIOS and we should have no problem to run higher DDR speeds. CPU and NB Clock Skew settings from Normal to 700 in steps of 50ps could do the trick.