Copied from an OCZ forum sticky. I could not find anything from Intel regarding the best strip size for the X25-E so I tested it myself with synthetic benchmarks and 128/256k seemed to be the best all round performers.

Nand IC's used in SSD's have a 4KB page file.

Let us start with our JMicron based SSD's

The JMicron controller MCU (602) used in Core series, Solid series and Apex (2x in raid 0) works in the following way.

602 SSD controller is basically 8bit MCU basis. internally 16bit operation. (In / Out)
The controller is actually 4 chips embedded in 1 package so 4 MCU's.
Flash chip provides multi page read and write. (Actually 2page) with Interleave.
So, 2Byte * 4way * 2 way * 2 page = 32page operation for the maximum performance solution.

32page = 32 * 4KB = 128KB stripe.

So keeping things simple:

Core and Solid series drives use 1xJM602 controller, with the controller being 4 controllers in 1 package they are actually in effect running raid0 with a 128k stripe.

Now Apex uses a separate raid controller IC on the PCB of the SSD with 2x602 controllers. So stripe size will be 2x128k so 256k stripe.

So Core and Solid 128k
Apex................. 256k