That great results
TinTin!
Can you share with us your bios settings? ( I cant pass 212 blck on SPi32M)
QUOTE]
For 223X19
CPU Voltage: 1.375V (maybe lesser)
CPU PLL Voltage: 1.88V
QPI/DRAM Core Voltage: 1.5V
IOH Voltage: 1.28V
IOH PCIE Voltage: 1.5V
ICH Voltage: 1.1V
ICH PCIE Voltage: 1.5V
DRAM Bus Voltage: 1.64V
Load Line Calibration:
CPU Differential Amplitude: 0.800mV
CPU Clock Skew: AUTO
CPU Spread Spectrum: DISABLE
IOH Clock Skew : AUTO
PCIE Spread Spectrum: DISABLE
Advance CPU Settings
CPU Ratio Setting: 19
C1E Suppport: DISABLE
Hardware Prefetcher: ENABLE
Adjacent Cache Line Prefetch ENABLE
Intel® Virtualization Tech: DISABLE
CPU TM Function: DISABLE
Execute Disable Bit: ENABLE
Intel (R) HT Techology: ENABLE
Active Processor Cores: ALL
A20M:
Intel (R) SpeedStep (TM) Tech: DISABLE
Intel (R) Turbo Mode Tech: DISABLE
Intel (R) C-STATE Tech: DISABLE
My first 920 can't POST after 213bclk whatever the settings are, but after switch to this batch, it can POST at 228bclk(sometimes 227bclk), so there is bclk wall just like C2D. But my friend told me, these two 920 can POST more than 230bclk on his DFI DK, so also something related to MB when closing to their limit.

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