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Thread: Live MB OC Report :: ASUS Rampage Extreme

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  1. #1
    Xtreme Member
    Join Date
    Aug 2008
    Location
    Hong Kong
    Posts
    327
    Quote Originally Posted by WhiteFireDragon View Post
    i'm at 495fsb with a q9650 but i just can't get the last 5mhz. every time i do, the system locks up and freezes everything. even pressing the reset button will take about 3-5 seconds before it actually restarts. what is causing this type of freeze instability? i'm suspecting it's my memory. i'm writing down my settings right now and i'll post it in a bit

    edit: here's my bios settings that i tuned myself:


    Code:
    Processor:  q9650
    OC From Memory Level Up: Auto
    Ai Overclock Tuner: Manual
    FSB Frequency: 500
    Ratio CMOS Setting: 6
    CPU Clock Skew: -200ps
    NB Clock Skew: -100ps
    FSB Strap to North Bridge:  333 MHz
    DRAM Frequency: 1601 MHz
    
    DRAM Timing Control: Manual
    1st Information: 9-9-9-28 (all other subtimings on auto)
    
    DRAM Static Read Control: Disabled
    DRAM Read Training: Disabled
    Ai Clock Twister: Auto
    Ai Transaction Booster: Auto
    
    EPU II Phase Control: Auto
    
    PCIE Frequency: 101
    
    CPU Voltage: 1.34375
    Load-Line Calibration: Enabled
    CPU PLL Voltage: 1.55081
    FSB Termination Voltage: 1.39166
    North Bridge Voltage:  1.51097
    DRAM Voltage: 2.00131
    South Bridge 1.5 Voltage:  1.55081
    South Bridge 1.1 Voltage: 1.10014 
    
    CPU GTL Reference (0): +60mV
    CPU GTL Reference (1): +20mV
    CPU GTL Reference (2): +60mV
    CPU GTL Reference (3): +20mV
    NB GTL Reference:  +40mV
    DDR2 ChA Reference Voltage: Auto
    DDR2 ChB Reference Voltage: Auto
    North Bridge DDR Reference: Auto
    
    CPU Spread Spectrum: Disabled
    PCIE Spread Spectrum: Disabled
    Exactly what's happening to me when I'm playing with this Quad core.
    Try upping CPU clock skew to 300ps and see if it improves.
    Intel XEON X5650 B1 Retail x2 3012A692

    EVGA Classified SR-2 BIOS A50
    Crucial Ballistix PC3-1333 CL6 D9GTR 2G Kit (Active)
    Crucial Ballistix PC3-2000 CL9 D9GTS 2G Kit (Active)
    Thermaltake V1R (in use, without heatpipe)
    Cooler Master Silent Pro M 1000W PSU
    Galaxy GTX 275 (Digital PWM)
    WD 10EALX

    Overclock:
    Currently running @ Default.

    Intel i7-2600K (L041C107, L048B284, L050A853)
    Asus P8P67 Pro BIOS 1305
    WC setup EK Supreme HF GOLD Edition powered by BlackICE GTX 480
    G.Skill 12800CL7D-4GBECO x2 packs
    WD 10EALX
    Intel X25-M 120GB
    MSI NGTX560Ti Twin Frozer SLI

    Overclock:
    40x100 4Ghz 1.15v [Currently testing L048B284]

  2. #2
    Xtreme Member
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    Aug 2008
    Location
    Hong Kong
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    327
    OK Time for more.
    I'll post my settings now with E8500 dual core to achieve 600x7.5 IBT 10 loop stable.

    Processor: E8500
    OC From Memory Level Up: Auto
    Ai Overclock Tuner: Manual
    FSB Frequency: 600
    Ratio CMOS Setting: 7.5
    CPU Clock Skew: -400ps
    NB Clock Skew: -200ps
    FSB Strap to North Bridge: 266 MHz
    DRAM Frequency: 1805 MHz

    DRAM Timing Control: Manual
    1st Information: 7-6-5-18 tRFC 72 (all other subtimings on auto)

    DRAM Static Read Control: Disabled
    DRAM Dynamic Write Control: Disabled
    Ai Clock Twister: Auto
    Ai Transaction Booster: tRD = 8

    EPU II Phase Control: Auto

    PCIE Frequency: 103

    CPU Voltage: 1.3625
    Load-Line Calibration: Enabled
    CPU PLL Voltage: 1.61
    FSB Termination Voltage: 1.37841
    North Bridge Voltage: 1.65
    DRAM Voltage: 2.00131
    South Bridge 1.5 Voltage: 1.61
    South Bridge 1.1 Voltage: 1.08

    DRAM Channel A CMD Skew: Advance 100ps
    DRAM Channel B CMD Skew: Advance 50ps

    CPU GTL Reference (0): AUTO
    CPU GTL Reference (1): AUTO
    CPU GTL Reference (2): AUTO
    CPU GTL Reference (3): AUTO
    NB GTL Reference: +20mV
    DDR2 ChA Reference Voltage: Auto
    DDR2 ChB Reference Voltage: +25mv
    North Bridge DDR Reference: +25mv

    CPU Spread Spectrum: Disabled
    PCIE Spread Spectrum: Disabled

    Note: If you want to get 600FSB 4.5Ghz stable with 333 Strap you will need ot adjust CPU Skew to 300~400ps and NB skew to 100ps. At least these settings works for me.
    Intel XEON X5650 B1 Retail x2 3012A692

    EVGA Classified SR-2 BIOS A50
    Crucial Ballistix PC3-1333 CL6 D9GTR 2G Kit (Active)
    Crucial Ballistix PC3-2000 CL9 D9GTS 2G Kit (Active)
    Thermaltake V1R (in use, without heatpipe)
    Cooler Master Silent Pro M 1000W PSU
    Galaxy GTX 275 (Digital PWM)
    WD 10EALX

    Overclock:
    Currently running @ Default.

    Intel i7-2600K (L041C107, L048B284, L050A853)
    Asus P8P67 Pro BIOS 1305
    WC setup EK Supreme HF GOLD Edition powered by BlackICE GTX 480
    G.Skill 12800CL7D-4GBECO x2 packs
    WD 10EALX
    Intel X25-M 120GB
    MSI NGTX560Ti Twin Frozer SLI

    Overclock:
    40x100 4Ghz 1.15v [Currently testing L048B284]

  3. #3
    Xtreme Cruncher
    Join Date
    Jul 2007
    Location
    @ the computer
    Posts
    2,510
    Quote Originally Posted by ci2kla View Post
    Exactly what's happening to me when I'm playing with this Quad core.
    Try upping CPU clock skew to 300ps and see if it improves.
    i just tried changing the NB and CPU skew to combinations of delay 100, 200, and 300 and it won't boot. it wants exactly 200 CPU and 100 to even boot at 500fsb.

    i upped the vtt, pll, and NB voltage and it's not locking anymore. however, core 2 still fails prime after an hour but the other 3 cores were stable for over 7 hours. perhaps if you get lock ups too, try upping some of the voltages
    [SIGPIC][/SIGPIC]

  4. #4
    Xtreme Member
    Join Date
    Aug 2008
    Location
    Surrey, UK
    Posts
    214
    thanks ragheb , you've answered both my questions to ci2kla... though it seems that 266 strap/2:3/tRD8 is relatively inefficient: 333strap/5:8 gives same performance even with CL8/tRD9, but less vNB needed.

    At this clock with CL7/tRD8 on 333strap, the Read difference is quite large.
    2.1V vDIMM could be enough for that..

    Maximus V GENE [0086] :: 3770K L212B244 :: H70 :: EB3103A (PSC)

    CL|WCL|RTL performance (SB) : 32M scaling charts : PSC WCL > CL performance bug



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