Amd steppings and what they mean.........

[HondaGuy]

Charge::: installed my 9850 on M3A79-T,,, I am able to hit 3.5 stable in Vista 64 so far.......Best I could with M3A32-MVP in vista is 3.3

[Oliverda]

My 9850 was 0816GPMW--80259...and Overclocks like crazy

Yes. The xPMW is always a good sign but it depends on the date of the mfg. as well. Otherwise the 0816GPMW is one of the best from rev. B3 silicon.

[roofsniper]

8001 may have been the center most die or a flaky one on the outside edge.

many people think that they are numbered from the middle outward so if you get a low number it is a good ocer. this is actually not true they are numbered from left to right starting at the top left. and im pretty sure that the last 4 numbers on the top line are when they are packaged just like the amd paper says.

[chew*]

many people think that they are numbered from the middle outward so if you get a low number it is a good ocer. this is actually not true they are numbered from left to right starting at the top left. and im pretty sure that the last 4 numbers on the top line are when they are packaged just like the amd paper says.

I'm sure amd would love to know this.....

[roofsniper]

I'm sure amd would love to know this.....

know what? how they are numbered? because thats where i found this info out from.

[chew*]

know what? how they are numbered? because thats where i found this info out from.

sometimes actually alot of times companies depend on misinformation, wars were won that way, take everything your told with a grain of salt......I was told by an amd employee that am2+ phenom would work on socket am3 boards........case in point.

[roofsniper]

sometimes actually alot of times companies depend on misinformation, wars were won that way, take everything your told with a grain of salt......I was told by an amd employee that am2+ phenom would work on socket am3 boards........case in point.

yea i know i remember that. im pretty sure my source is correct since he has been working there for 25+ years but im curious as to how any of this info got out in the first place. i can't google any of the info on how they are numbered does anyone have any sources on this?

[cadaveca]

I'll take credit for the info

[uncle john]

The center of the wafer is the best. What constitutes best?

Is the batch number assigned after the die is tested and separated from the wafer or before seperation?

Why does a $50 cpu overclock better than a $150 cpu in some situations?



It's luck. Luck. Luck. Luck. Unless you get a CABGE then it's just bad karma.

[cadaveca]

http://www.xtremesystems.org/forums/...ad.php?t=87182

[chew*]

http://www.xtremesystems.org/forums/...ad.php?t=87182

Yep thats the original thread, I helped S7 out a little on it, just made this thread as a refresher.

[roofsniper]

http://www.xtremesystems.org/forums/...ad.php?t=87182

yea thats for the first 5 numbers on that chip. although the first number an A represents an ES which would also include early chips.

[cadaveca]

the 0543SPMW comes from AMD direct by way of whitepapers. The link to that whitepaper on AMD servers is in that thread.

[HondaGuy]

Yes. The xPMW is always a good sign but it depends on the date of the mfg. as well. Otherwise the 0816GPMW is one of the best from rev. B3 silicon.

CABQE

C > final production batches will be a "C" (for current chips)
A > A = single core, 1MB
BQ > new stepping
E > rev E (Revision Code)

0547

05 > The last 2 digits of the year in which the product was seal/molded
47 > Work week in which the product was seal/molded

GPAW

G > Alpha/numeric character for the day of the week during which the product was seal/molded.
P > Alpha/numeric character for the assembly location
A > Alpha/numeric character for the wafer lot seaquence for the day.
W > On rare occasions, a "w" may be added to the DC to designate that combining wafer lots is prohibited.

[largon]

Amount of L2 is already among the 1st row so it only makes sense there's a letter for L3 in there too.

The letter for the first five is for L2, (...)

Huh? I have no idea what you're trying to say.

I'm pretty sure the AC is related to L3 cache, and to support this these letter only came up with the K10, my K8 doesn't have those letters (I can post a pic if you don't believe)

I am not saying that "AC" wouldn't be related to L3 - which is evident from what I said earlier (post #24, eg). But as I said, it clearly isn't the amount of L3.

[knopflerbruce]

It's no point in trying to figure out is an BPAW is better than a FPCW. from MY experience, at least, you can only tell that - on average - an xxxxx yymm xPAW is better than xxxxx yymm xPBW and so on (if you got it, for instance, a CAB1E 0614EPCW is often better than alot of other 939 xPAW's. However, I have 3 Opty 146's, and the CABYE 0540FPAW is a LITTLE bit better than the CABYE 0540FPBW's I have.)

The first letter of the xPxW-code is related to production day, so to see any OC'ing pattern by using that one is useless as it's related to DATE and not quality

[BeepBeep2]

Hi all, I would now like to thank Movieman for getting me into the forum...

For those confused about the "4 letters",

read here
http://www.ocforums.com/showpost.php?p=2748997

[roofsniper]

Hi all, I would now like to thank Movieman for getting me into the forum...

For those confused about the "4 letters",

read here
http://www.ocforums.com/showpost.php?p=2748997

yea that link has the same link that has been posted twice already

im pretty sure that is the correct way since it is everywhere and is from amd.

[cbjaust]

Hi chew*,

I just bought these today, well today for you; yesterday for me . I haven't had a chance to do much more than take photos:

PII X4 940BE:


and Athlon X2 6400+ Windsor:


The Windsor is 0901 with a lot of zeros (well, three!) and then a 4 in the code !

What would have to say about those then?

Cheers

[BertM]

wow we have practicaly the same phenom.
except for the 80473 which is 80555 here, everything is the same.

[chew*]

Week 0901 0004 batch and MPMW I think you may have found a winner

The 940 will be average most likely, nothing spectacular.

[G.Foyle]

About the two letters in the middle of the second line: I have three Athlons here, all K10 or higher, two with L3 cache, and one without (not even on the die), and one without has AE, both with L3 have AA.
All Deneb Phenoms here have AC.

[chew*]

Now thats interesting.....Could it have been a failed chip that had cache but got pushed down the bin line?

[G.Foyle]

No, as I said it's a certain chip that doesn't even have L3 on the die it has it's own mask.

[chew*]

No, as I said it's a certain chip that doesn't even have L3 on the die it has it's own mask.

Hmm than that debunks that idea....which raises only more questions.