Quote Originally Posted by Cluster View Post
Actually, if my math is right, my latency is lower, and my bandwidth is higher.

474 = 237Mhz = 4.22ns(time per clock) x 4 = 16.87ns
610 = 305Mhz = 3.27ns(time per clock) x 5 = 16.39ns

Remember, latency isnt just the clock setting you put in the bios. You have to factor in the time of each clock. Saying CL4 > CL5 is like saying a 11x multi > 10x multi... kind of meaningless unless you know the FSB of each.

I also racked up this too, 5m 42s wPrime1024:
I was testing a little bit my Cellshocks yesterday..
With AUTO at DRAM settings, I booted at 200 fsb with 533 DRAM Frequency.
My timings were set at 5-6-6.
From AOD I changed them to 5-5-5 and managed to run SPI until FSB 225.When I increased more I got a restart.
When I changed the timings at 5-5-5 in BIOS, my pc couldn't boot and I only could clear cmos to boot.

So, what is your opinion.How your cellshocks are behaving?You think I should put more voltage to them?Are you running 24/7 at 2,2 vdimm??