ASUS Maximus II Formula - new P45 king?

[shaffaaf27]

need help OCing my new rig (Q9550)

got an E0 Q9550 from ebuyer, and a maximus II formula, and watercooeld it.

under OCCT my max FSB i can get to pass is 467, but game crash within seconds....

these are my voltages:



(btw temps under laod never go above 50 on any core)

[Musho]

need help OCing my new rig (Q9550)

got an E0 Q9550 from ebuyer, and a maximus II formula, and watercooeld it.

under OCCT my max FSB i can get to pass is 467, but game crash within seconds....

these are my voltages:



(btw temps under laod never go above 50 on any core)

Get those voltages off of auto! The maximum safe CPU PLL voltage is considered 1.6V. 1.7V is already quite extreme. Yours is at almost 1,8V Also, I wouldn't go over 1,45 VTT. You're getting close to this value, as you're already at 1,44v. I am using just 1,3v at 8,5x475fsb. Put your CPU and NB clock skews on normal (not auto!) and test if you gain any stability. Also try out (100ps delay on CPU with normal on NB) and (normal on CPU with 100ps delay on NB). Out of these 3 possible combinations, pick the most stable. Set your VTT to 1,4ish. You can back this voltage off later. vNB at 1,45 is indeed a good start, but you should try to get that one down later one, once you get your setup stable. Now you should SLOWLY increase your FSB. You shouldn't have to increase any voltages to get it stable. (you might need up to 1,45v Vcore to get 4ghz stable, though)

Set your NB GTL reference voltage on auto and set CPU GTL reference voltage on auto on all 4 options. While you're working up on the FSB you'll notice cores failing in prime95. Take note of which cores are failing. If core 0 or 1 fail, you'll have to play with CPU GTL reference 0 and CPU GTL reference 2. If core 2 or 3 fail, you'll have to play with CPU GTL reference 1 and 3. Note: GTL reference numbers do NOT represent cores. 2 cores on the same die use the same GTL voltage. Both dies have 2 different GTL voltages. One for the address bus, and one for the data bus. For now, always keep GTL 0 and 2 the same. And keep GTL 1 and 3 the same value too. So you'll have to figure out 2 values. 1 value for both GTL 0 and 2. And one value for both GTL 1 and 3. You can finetune them seperately later. Getting cores stable with GTL is purely trial and error. Every single CPU responds differently to different GTLs, and even different boards have different amounts of vDrop on the GTL lanes. Just trying anything ranging from -70 to +70 till you get all cores stable again, and start moving up again on the FSB, till cores start to fail again. Then you have to tune GTLs again, etc etc

Edit: Use small FFTs to test GTL reference stability in prime95.