@unclewebb
It is possible to have in realtemp a measure of the percentage of the time a core is in C3 or C6 state for i7?
In the pdf linked by rge, Intel explains how to take these measures by using the counters MSR_CORE_C3_RESIDENCY and MSR_CORE_C6_RESIDENCY (core level MSRs that run at the package level frequency, the same one of the TSC).