The Wolfdale Vtt ( FSB Termination ) game.Place your bet!

[mikeyakame]

did increase voltage for my crappy E8500 @ vtt to 1.9 and pll to 2.0 and orthos at pri10 for 1 day, it still alive but degraded haha
previously it need 1.425v to run spi 32m now it need 1.55v to be stable xD

thats probably a result of the extremely large gap between vcc and vtt values. too much vtt with respect to vcc and you'll overshoot the transient vcc peak far beyond anything its designed to handle. too much vcc with respect to vtt and you'll end up damaging the chip over time from switching the instaneous voltage during on/off cycles, and having no vtt buffer to reduce the max voltage at peak and cut supply if the swing period exceeds 10ns if i recall.

maintaining a little overhead with vtt on vcc i've found works the best in my testing, and is probably why i've been able to push some reasonably high voltages 24/7 on my 65nm chip with no degradation as far as i can prove during the 1.5yrs ive owned it.