Deneb just around the corner?

[GenTarkin]

In response to all the cache inquiries..made above. I thought sometime back it was discussed some of the major improvements of the deneb included cache associativity or width increases with deneb vs barcelona.... Anyone else aware of this?

[Oliverda]

AMD back on track with Shanghai CPU

[YukonTrooper]

Taken from article:

AMD's four-core, 45 nm Shanghai processor is shipping now, ahead of schedule.

I'm guessing there can still be an NDA, even though the chips have shipped? I wonder if we'll see any leaked benchmarks.

[charged3800z24]

In response to all the cache inquiries..made above. I thought sometime back it was discussed some of the major improvements of the deneb included cache associativity or width increases with deneb vs barcelona.... Anyone else aware of this?

Deneb left and Agena Right

[roofsniper]

The chip, which AMD has not yet formally announced, will be priced aggressively and is getting performance measures as high as 35 percent above its previous 65 nm Barcelona while consuming as much as 30 percent less power, said Burke Banda, a server marketing manager for AMD.

sounds like a pretty high ipc if you ask me. 15-20% could be correct. need to know what clock speeds they were comparing tho.

[Jazzman]

Deneb left and Agena Right

If you need a definition of "set associative" like I did, HERE it is...

Quote: "This scheme has fewer collisions because you have more slots to pick from, even when cache lines map to the same set."

[informal]

sounds like a pretty high ipc if you ask me. 15-20% could be correct. need to know what clock speeds they were comparing tho.

2.7Ghz(SH) vs 2.5(Barc).So it is 25% clock for clock (135/1.08=125,or 25%;100 is 2.5Ghz Barc ,135 is SH @ 2.7Ghz).
25% should be average(or close to it) increase for server workloads.Desktop should be somewhat lower,but still a good 10-15%(this can vary of course).What is important as much or even more as IPC is fact that clocks will go up dramatically(stock and OCs) and power draw will go down dramatically.In my book it's success

Just for reference,compare the AM2 or even AM3 version of Deneb working @ 3.2Ghz versus now shipping Agena@ 2.6Ghz:
3.2Ghz Deneb should be as fast as 3.2*1.1=3.52Ghz Agena ,if we take a lower end(10%) of the projected IPC improvement
3.52/2.6=1.35 or 35% faster

OR if we take 15% of IPC improvement(higher end of the projection,less probable):
3.68/2.6=1.41 or 41% faster

Or least probable(server projected IPC improvement,least likely to be seen on desktop):
3.84/2.6=1.47 or 47% faster

[Glow9]

Drives me nuts I cant find it but if you guys do some digging there an AMD exec interview on youtube where they say it's going to be a 10-13% improvement. So if its anything higher I will be happy. Food for thought if you guys wanna go scrounge through a bunch of vids

[roofsniper]

no doubt about it deneb is going to be an amazing chip. i guess the only question left is how it compares to high end core 2 cpus and with nehalem. i have a feeling it should outperform core 2 cpus but im not sure about nehalem. need to see some benchies and get more information for that. i hope deneb/shanghai is enough to get amd back up there and in line with intel. i bet amd will finnally have a profitable quarter this quarter even tho we are already halfway into Q4.

[roofsniper]

Drives me nuts I cant find it but if you guys do some digging there an AMD exec interview on youtube where they say it's going to be a 10-13% improvement. So if its anything higher I will be happy. Food for thought if you guys wanna go scrounge through a bunch of vids

maybe 10-13% ipc. but after taking in the higher clocks and higher overclocks the performance will be much higher. how old was the video anyway?

[informal]

Nice try Glow9...

http://www.youtube.com/watch?v=fOc3ayl0zrw

BTW,you have a quote already from the article from yesterday where AMD official is stating:

AMD's four-core, 45 nm Shanghai processor is shipping now, ahead of schedule. The chip, which AMD has not yet formally announced, will be priced aggressively and is getting performance measures as high as 35 percent above its previous 65 nm Barcelona while consuming as much as 30 percent less power, said Burke Banda, a server marketing manager for AMD.

http://www.eetimes.com/news/latest/s...leID=212001228

More luck next time though...

PS Shanghai is server MPU so the obvious thing is they are speaking of different workloads from desktop,just FYI.

[roofsniper]

Nice try Glow9...

http://www.youtube.com/watch?v=fOc3ayl0zrw

BTW,you have a quote already from the article from yesterday where AMD official is stating:

http://www.eetimes.com/news/latest/s...leID=212001228

More luck next time though...

PS Shanghai is server MPU so the obvious thing is they are speaking of different workloads from desktop,just FYI.

yea i just found that vid about 10 seconds ago. i didn't watch it but i went to their site: http://www.uberpulse.com/us/2008/08/...reat_video.php

and i bet deneb vs agena will be much greater than shanghai vs barcelona mostly because of stock clock and overclock reasons.

[charged3800z24]

If you need a definition of "set associative" like I did, HERE it is...

Quote: "This scheme has fewer collisions because you have more slots to pick from, even when cache lines map to the same set."

I didn't read clearly...

[demonkevy666]

I didn't read clearly...

add this for Cpu-z this for all your thoughts about Deneb.

http://www.xtremesystems.org/Forums/...1&d=1222483834 Nehalem cache this was pain in the ass to find >_<

let me rmind people of this.

Conroe has 4mb of cache and this Kuma has 3mb.

that's 25% less cache and 1-2% slower pre clock.

core vs K10 but if we're getting a cache bump expect it to improve.

[TheBlueChanell]

I'm excited for Deneb. I have my M3A79-T sitting behind me awaiting it and I may pick up a DFI 790FXB as well. The price premium of X58 and DDR3 is too much in my opinion.

If Deneb still performs slower than Kentsfield I would be upset but I really don't think that's an option for AMD at this point considering how barcelona performs compared to kentsfield. It's slower in most benchmarks but it hangs.

If Deneb performs between Kentsfield and Penryn that would be acceptable and I'd be happy.

If Deneb performs better than Penryn than I will be extremely happy and it would make for an affordable, nice alternative to Core2 and maybe even X58 depending on the prices and how you look at it. If that's the case than I'd recommend a 790FX/GX and Deneb over X48/P45 and Penryn.

The X48 as far as I know still have problems with the FSB Wall with Quads. I did not experience that with my P5Q Deluxe/Q9450 but I'd rather have an X48 for 16x/16x Crossfire. That to me makes 790FX very appealing because it is so cheap and offers pretty much every feature of X48.

Only time will tell but I am very excited. The first 4850x2 showed up on newegg a few days ago so now all I'm waiting on is Deneb and I can finally get my build underway.

[roofsniper]

add this for Cpu-z this for all your thoughts about Deneb.

http://www.xtremesystems.org/Forums/...1&d=1222483834 Nehalem cache this was pain in the ass to find >_<

let me rmind people of this.



core vs K10 but if we're getting a cache bump expect it to improve.

ah yes i posted that awhile back when someone was saying how good nehalem's caches were compared to deneb's.

[wolverine]

My Thunderbird comments were only made because that was the last time AMD or their supporters were claiming great things were going to happen with a shrink and cache increase and I believe it serves as a cautionary tale.
If people want to make over the top optimistic performance predictions for Deneb, there is nothing wrong with me questioning those claims and pointing to historical precedents which show those kind of gains just have not been achieved before from a shrink and more cache.

Uh thunderbird was still .18 process as the previous Slot A processor,AND
was also different socket.462 or Socket A. The name was the same, Athlon.

[EvilBlitz]

Id say he means tbred A , not thunderbird. Deneb is definitely not going to be a tbred-a. Thunderbird was great as well.

[possessed]

yes, daneb will be more similar to barton in that case, except for the lack of a new manufacturing process back then.

[Doctor Pepper]

Hmm, 48-way set associative sounds as it could increase cache hits by up to 50% compared to 32-way set associative. This would possibly increase the efficacy of the L3 cache, even without raising the frequency or increasing size…

Or, maybe not…?


Could someone with more insight in this matter elaborate (or speculate) over what this could mean for the overall performance?

[roofsniper]

yea id really like to see what is going on with that l3 cache. intel seems to have designed a pretty good l3 cache but amd's could be better because of the fact of 48 way compared to a 16 way. if shanghai is already shipping hopefully we can find some benchmarks around here.

[Jazzman]

yea id really like to see what is going on with that l3 cache. intel seems to have designed a pretty good l3 cache but amd's could be better because of the fact of 48 way compared to a 16 way. if shanghai is already shipping hopefully we can find some benchmarks around here.

NDA be damned!! Found this on an AMD message board. I know, hearsay, BS, etc, etc. SOURCE

According to our internal testing, we found that its 20-30% faster than Barcelona on floating point applications like CAE, CFD, life sciences, etc. Its 20% faster on integer codes like Web and database applications. Overall, Intel Nehalem and AMD Shanghai are neck to neck across wide range of server applications.

[Chris_redfield]

Whats the price of the new Shanghai CPU's?

[Eson]

The way i understand it from http://www.cs.umd.edu/class/sum2003/...mory/set.html:

More slots (higher Set Associative) is a more serial approach while fewer slots is more of a parallel approach.

Example: 4x4 bit matrix (parking lot).
With 64-way Set Associative this would mean in worst case you must search trough the whole matrix for finding a spot. However if the first search is free then you save a lot of time.
With 1-way Set Associative would mean you know where the fixed spot is but it could be very far away. The advantage is that you know how long time it takes to get to each spot and maybe can optimize the priority for each spot.

Interesting is that Intel seems to go for flexible core cache(L1) and stricter system cache(L3) while AMD goes for stricter core cache(L1) and flexible system cache(L3).

[Nedjo]

Whats the price of the new Shanghai CPU's?

they are lower than the same clocked Barcelonas!