45nm Phenom Overclocked, Super Pied

[Particle]

JPEG compression works in blocks just like popular video compressions do. It isn't weird in the least that the artifacts line up roughly to a grid pattern. That grid can be tweaked by whatever program is doing the compression too, so don't expect all programs to save an image in the same way.

The only thing that does concern me is that the leading letter is small across all columns in AOD. You'll notice from other shots of AOD that the first column is all small lettering while the other three are all large. In the 4GHz screenshot, the 4 is small across all four columns while the rest of the lettering in those other columns is large as expected. It seems likely to me that the person who originated the image replaced a 2 or 3 on the first column with a 4 and then did the same transform to the other three columns, forgetting to increase the size because of the mismatch in font sizes.

Edit:
Nevermind. The 4 and 1 are smaller than some of the other characters. The 4 is indeed bigger in the other columns by 1 pixel and agrees with the voltage readouts, etc. It makes sense, as a 4 big enough to reach the top would look like a 9.

[HondaGuy]

Psychlone:

Im jealous with the 3.5 on 1.375...So far I've only gotten 3.4 on 1.45volts and still testing on the 9850 JAAHB AA 0816GPMW




CPU Z
http://valid.x86-secret.com/show_oc.php?id=397164

[charged3800z24]

JPEG compression works in blocks just like popular video compressions do. It isn't weird in the least that the artifacts line up roughly to a grid pattern. That grid can be tweaked by whatever program is doing the compression too, so don't expect all programs to save an image in the same way.

The only thing that does concern me is that the leading letter is small across all columns in AOD. You'll notice from other shots of AOD that the first column is all small lettering while the other three are all large. In the 4GHz screenshot, the 4 is small across all four columns while the rest of the lettering in those other columns is large as expected. It seems likely to me that the person who originated the image replaced a 2 or 3 on the first column with a 4 and then did the same transform to the other three columns, forgetting to increase the size because of the mismatch in font sizes.

Edit:
Nevermind. The 4 and 1 are smaller than some of the other characters. The 4 is indeed bigger in the other columns by 1 pixel and agrees with the voltage readouts, etc. It makes sense, as a 4 big enough to reach the top would look like a 9.

You know why the 4 is smaller right???? there is a top on the 2 and the 0's the 4 has no top. Looks the same on my alarm clock......

Edit. I read your post wrong I think... Oh well.....

[xVeinx]

Does anyone know the approximate timeframe for Deneb release?

[Macadamia]

Q408. Later than Neh, but in time for October I think.

[JCornell]

Well done for Deneb @4GHz
Fake or not, where's the simple bench like PI ? PI1M might touches 15s at least, right ?

[Astennu]

I realy hope its true. AMD needs it and we need it.

If intel keeps on dominating they also keep the prices high and thats not good for us.

[Astennu]

Psychlone:

Im jealous with the 3.5 on 1.375...So far I've only gotten 3.4 on 1.45volts and still testing on the 9850 JAAHB AA 0816GPMW




CPU Z
http://valid.x86-secret.com/show_oc.php?id=397164

You might score higher or the same speeds with lower voltages if you have a board with SB750 (ACC)

[informal]

Actually,if you look at the title of this thread you might see that it was SPied(means it ran SPI1M).
No offence ,but why on earth would you like to know the SPI1M result(apart from comparing it to Agena's score to see if any improvement is there)??SPi is a poor "benchmark",it has always been,it will always bee.It is even poor in calculating pi,slow as hell.You have much better programs that calculate Pi in fractions of the second ,compared to lame SuperPi.
But to answer you question,Deneb @3.48Ghz scored 19.696s and that's a new WR for any AMD chip.Agena must work at around 3.97Ghz to score the same result,so Deneb is faster from 12-14% in this test(depends on NorthBridge speed).A 4Ghz deneb will be around 15% faster that the 1st result in this thread,so around ~16.9s.
And according to SPi numbers,if we use them as a general performance metric(ludicrous),it would imply that Yorkfield is faster than both deneb/agena by as much as 40-50% in general computing power which is beyond ludicrous(45nm C2Q is around 15% faster than Agena,on average).

[Newblar]

Actually,if you look at the title of this thread you might see that it was SPied(means it ran SPI1M).
No offence ,but why on earth would you like to know the SPI1M result(apart from comparing it to Agena's score to see if any improvement is there)??SPi is a poor "benchmark",it has always been,it will always bee.It is even poor in calculating pi,slow as hell.You have much better programs that calculate Pi in fractions of the second ,compared to lame SuperPi.
But to answer you question,Deneb @3.48Ghz scored 19.696s and that's a new WR for any AMD chip.Agena must work at around 3.97Ghz to score the same result,so Deneb is faster from 12-14% in this test(depends on NorthBridge speed).A 4Ghz deneb will be around 15% faster that the 1st result in this thread,so around ~16.9s.
And according to SPi numbers,if we use them as a general performance metric(ludicrous),it would imply that Yorkfield is faster than both deneb/agena by as much as 40-50% in general computing power which is beyond ludicrous(45nm C2Q is around 15% faster than Agena,on average).

yeah but superpi is as easy to get as pie
almost everyone has it and everyone uses it... its going to be like this for a long time coming

[FlanK3r]

Well done for Deneb @4GHz
Fake or not, where's the simple bench like PI ? PI1M might touches 15s at least, right ?

sorry man, but i know good, superpi isnt great benchmark for today processors..Wprime is better for more core CPUs..Superpi is good only for same architecture (K8 vs K8 shrink etc, Core 65nm vs Core 45nm and his L2 cache ...)

[JCornell]

sorry man, but i know good, superpi isnt great benchmark for today processors..Wprime is better for more core CPUs..Superpi is good only for same architecture (K8 vs K8 shrink etc, Core 65nm vs Core 45nm and his L2 cache ...)

Yeah, I know. Many said its might not stable enough to bench multithread from this early chip and high vcore. So PI1M will be enough to be part of reference, and easy enough to run on unstable overclocked(if so).

[Particle]

I would say that Agena is not 10-15% slower than C2Q. It might be closer to half of that, and the difference decreases the higher the frequency goes. That FSB is really killing them. At around 3.5GHz, many tasks seem to be about the same (aka, ~0% avg delta).

[Macadamia]

Particle, which C2Q would you be referring to? 45nm or 65?

[informal]

Agena is around 6%-8% slower than Kentsfield C2Q,on average,per clock.This is all with the crappy reviews we have today(using synthetic crap tests which we saw how they benchmark CPUs- ie. PCmark05).
Yorkfield is around 5%-7% over Kentsfield(somewhere more somewhere less).

[RiverRicer]

Interesting read on PCMark05--

http://arstechnica.com/reviews/hardw...o-review.ars/6

[Devil's Prophet]

Interesting read on PCMark05--

http://arstechnica.com/reviews/hardw...o-review.ars/6

Those bastards at MadOnion!

[iocedmyself]

Well after reading the Nehalem review i'm really not that impressed with intel progress, they had to go back to the Pentium pro - P3 arch with core/2 and regardless of it's 32bit performance it's the arch is getting long in the tooth. Aside from being 45nm the nehalems only other real selling point is that it's an intel chip with what is essentially an AMD IMC. It's taken Intel near 6 years to get to the point of being able to COPY AMD's IMC, and despite how they may try and sell explinations such as

"we at intel don't really feel that there is any reason that conumers really need to have an IMC at this time, or the forseeable future, there is no significant performance gain to justify the additional difficulty in producing something that would be considerably more expensive for us to produce and thus make the product more expensive for the consumer. We were already working on a chip with an IMC back in 1998, were ready to launch it alongside the P4 but we realized there wasn't a market for it at the time and decided to focus our attention elsewhere. So the IMC is just another example of the "competition" following in our footsteps, not the other way around"

Which of course doesn't resemble the truth so much as "creative testimony." Intel omits the fact that they actually did launch chips with an IMC in '91 the 386SL and the 486SL which were 20mhz - 40mhz, despite AMD not even being on the radar at that point, the chip was such a PoS that vendors openly snubbed them and the chips were scrapped by '92. The chip they began working on in late '98, the Timna, the design was based around using Rambus RDRAM which never actually became affordable they had to scrap the design and rework it for use with SDRAM, pushing the launch back several times to final confirmed spring of 2001. But this was around the time that intel was getting ready to launch another industry milestone....netburst-ing P4. So it got pushed back again....along with the P4. Then of course when a test batch was rolled out...there was a pesky fatal design flaw. Which meant they would have to go and do more work, when really it wasn't worth putting so much effort into a cpu for a $500-$600 desktop, because thats not where the market was at, the consumers wanted to pay more money for their hardware, not less! So they scrapped it. So in reality they had already been a two time failure with IMC in the 12 year span prior to AMD 64's launch.

Then of course Intel also downplays 64bit applications and OS. Again, similar explinations to their reasoning for not having an IMC are given for not pushing 64bit Apps, or 64bit performance. Intel claims 64bit is just a marketing gimmick that in reality offers no real benifit in real world scenario's at this time. Well again, doesn't much resemble the truth, while the Alpha team at DEC produced the first 64bit RISC cpu in 91 or 92, intel partnered up with HP to develop the original IA-64 itanium in 94, with plans to launch by the end of 98, claiming that it would dominate the server market offering performance several times faster than anything else even concieved. So convincing were they that Microsoft tailored a Server OS specifically for Itanium HP and Intel invested billions in the project. Alas, much like the Timna, and the P4 the Itanic didn't actually launch until 2001. The Itanium was 64bit RISC processor, so it either had to run as a 64bit chip, in which case any 32bit code had to be emulated resulting in performance no even on par with 32bit desktop intel chips, or it had to be run as a dedicated 32bit processor....which meant that not only did it still perform worse than thier destop segment, but it made the 7 year multi-billion dollar project...well pointless. So of course by the time it was launched it was stomped by the competition. Every application had to be written specifically for the IA-64 to actually run in 64bit mode, which was more complicated than anyone imagined, it was slow, it ran hot and sucked up alot of power. That investment brokered sales in the thousands, not tens of thousands....4 digit thousands.

But strangely enough, here they are producing 64bit chips using the x86-64 code they have to licsense from AMD (even though 64bit is just a marketing gimmick) that will now use IMC's almost identical to AMD's even though Intel paved the way.

Going back to the original 500mhz Socket A chip (which was essentially an Alpha 64 with higher clock and larger caches) aside from acctually being a RISC processor optimized for 32bit, hypertransport was already built into the chip, though they had no plans to release the specs to all of the Motherboard manufacturers that were in bed with Intel. Socket A was implimented both as a holding pattern and distraction to intel while they developed the Opteron, which was actually meant to launch in 2001/'02. They already had the option of using an IMC since the Alpha engineers were working at AMD at that point, though they opted to introduce DDR instead and save the IMC for opteron. Actually, the Alpha EV8 was the first processor to offer similtanious multi-threading and was ready to launch two years before Intel got the P4 out, though EV8 got scrapped after DEC was sold off.

It really doesn't matter how much money Intel has, or how much faster they can shoot out die shrinks, they've never had tangible long term plans (which is probably why when they get ahead they go into production overtime putting out the same chips either on a different socket, with a smaller die, larger Cache faster clocks and then start going through that list using combinations) they seem to either think that just because they have a roadmap the market will remain in synch until they've carried through their plans, or it doesn't matter what the reality is so long as hundreds of millions are thrown into agressive marketing to set the public straight.

For instance after reading the nehalem review by anadtech, which showcased the cutting edge 64bit quad core running 32bit Cinebench i decided to clock my 9850BE phenom to 2.7ghz and see what my results were in 64bit vista ultimate with 4gigs of 1066mhz DDR2.

64Bit 32bit
1cpu= 2874 2245 21.88% performance gain
xCpu= 10550 8230 21.99% performance gain
speedup= 3.67 3.67
openGL 4564 4568

Incidently, the 2.66ghz Nehalem got 3048 in single core, and 12,400 i think running all 4 cores. I realize it's based off of results running on a unsupported x58 board...but seeing as how cinebench actually takes advantage of IMC 5.7% lead on a single core and 15% running 4 cores really isn't too impressive for a 45nm chip with twice the on die Cache....while running 1366mhz DDR3. But my how nice it is to see they have already worked their way back up to netburst features and ressurected hyper-threading.

As for the 4ghz clock on the 45nm AMD, it's entirely plausable, even on air cooling. Someone recently managed to break 4ghz with one of the B3 phenoms using phase change i blieve, and my 939 4400x2 toledo core clocked from the stock 2.2 up to 3.66ghz 24/7 stable using a TT Big typhoon with a 120mm 110cfm silverstone fan in place of the stock 54cfm fan, running on 1.475V, which i ran for 2 years until 3.5 weeks ago when i upgraded to my Phenom the highest i managed to boot and get a scuicide screenie was just shy of 3.8ghz though the voltage was pumped up to 1.525 or something insanely high like that.

Now that Dirk meyer is in the CEO seat at AMD, i think things are going to be looking much brighter for them. But then again, AMD has always put placeholder products out while they work on the secret project to wipe the floor with Intel.

[charged3800z24]

Wow. it would take me all day to write that lol.. nice to read any how. I do belive AMD has something going on in the back ground.. Plus they have beem very quiet as of late. but either way., I will still buy a Denab Phenom when they come out. It will plug right into my current setup. Nehelam will rquire a hole new board for any Intel users... so total cost wise.. I think I will stick with AMD this go around as well.

[dirtyd]

Interesting read on PCMark05--

http://arstechnica.com/reviews/hardw...o-review.ars/6

That's pretty revealing. I wonder what Futuremark has to say about that.

[Mechromancer]

Well after reading the Nehalem review i'm really not that impressed with intel progress, they had to go back to the Pentium pro - P3 arch with core/2 and regardless of it's 32bit performance it's the arch is getting long in the tooth. Aside from being 45nm the nehalems only other real selling point is that it's an intel chip with what is essentially an AMD IMC. It's taken Intel near 6 years to get to the point of being able to COPY AMD's IMC, and despite how they may try and sell explinations such as

"we at intel don't really feel that there is any reason that conumers really need to have an IMC at this time, or the forseeable future, there is no significant performance gain to justify the additional difficulty in producing something that would be considerably more expensive for us to produce and thus make the product more expensive for the consumer. We were already working on a chip with an IMC back in 1998, were ready to launch it alongside the P4 but we realized there wasn't a market for it at the time and decided to focus our attention elsewhere. So the IMC is just another example of the "competition" following in our footsteps, not the other way around"

Which of course doesn't resemble the truth so much as "creative testimony." Intel omits the fact that they actually did launch chips with an IMC in '91 the 386SL and the 486SL which were 20mhz - 40mhz, despite AMD not even being on the radar at that point, the chip was such a PoS that vendors openly snubbed them and the chips were scrapped by '92. The chip they began working on in late '98, the Timna, the design was based around using Rambus RDRAM which never actually became affordable they had to scrap the design and rework it for use with SDRAM, pushing the launch back several times to final confirmed spring of 2001. But this was around the time that intel was getting ready to launch another industry milestone....netburst-ing P4. So it got pushed back again....along with the P4. Then of course when a test batch was rolled out...there was a pesky fatal design flaw. Which meant they would have to go and do more work, when really it wasn't worth putting so much effort into a cpu for a $500-$600 desktop, because thats not where the market was at, the consumers wanted to pay more money for their hardware, not less! So they scrapped it. So in reality they had already been a two time failure with IMC in the 12 year span prior to AMD 64's launch.

Then of course Intel also downplays 64bit applications and OS. Again, similar explinations to their reasoning for not having an IMC are given for not pushing 64bit Apps, or 64bit performance. Intel claims 64bit is just a marketing gimmick that in reality offers no real benifit in real world scenario's at this time. Well again, doesn't much resemble the truth, while the Alpha team at DEC produced the first 64bit RISC cpu in 91 or 92, intel partnered up with HP to develop the original IA-64 itanium in 94, with plans to launch by the end of 98, claiming that it would dominate the server market offering performance several times faster than anything else even concieved. So convincing were they that Microsoft tailored a Server OS specifically for Itanium HP and Intel invested billions in the project. Alas, much like the Timna, and the P4 the Itanic didn't actually launch until 2001. The Itanium was 64bit RISC processor, so it either had to run as a 64bit chip, in which case any 32bit code had to be emulated resulting in performance no even on par with 32bit desktop intel chips, or it had to be run as a dedicated 32bit processor....which meant that not only did it still perform worse than thier destop segment, but it made the 7 year multi-billion dollar project...well pointless. So of course by the time it was launched it was stomped by the competition. Every application had to be written specifically for the IA-64 to actually run in 64bit mode, which was more complicated than anyone imagined, it was slow, it ran hot and sucked up alot of power. That investment brokered sales in the thousands, not tens of thousands....4 digit thousands.

But strangely enough, here they are producing 64bit chips using the x86-64 code they have to licsense from AMD (even though 64bit is just a marketing gimmick) that will now use IMC's almost identical to AMD's even though Intel paved the way.

Going back to the original 500mhz Socket A chip (which was essentially an Alpha 64 with higher clock and larger caches) aside from acctually being a RISC processor optimized for 32bit, hypertransport was already built into the chip, though they had no plans to release the specs to all of the Motherboard manufacturers that were in bed with Intel. Socket A was implimented both as a holding pattern and distraction to intel while they developed the Opteron, which was actually meant to launch in 2001/'02. They already had the option of using an IMC since the Alpha engineers were working at AMD at that point, though they opted to introduce DDR instead and save the IMC for opteron. Actually, the Alpha EV8 was the first processor to offer similtanious multi-threading and was ready to launch two years before Intel got the P4 out, though EV8 got scrapped after DEC was sold off.

It really doesn't matter how much money Intel has, or how much faster they can shoot out die shrinks, they've never had tangible long term plans (which is probably why when they get ahead they go into production overtime putting out the same chips either on a different socket, with a smaller die, larger Cache faster clocks and then start going through that list using combinations) they seem to either think that just because they have a roadmap the market will remain in synch until they've carried through their plans, or it doesn't matter what the reality is so long as hundreds of millions are thrown into agressive marketing to set the public straight.

For instance after reading the nehalem review by anadtech, which showcased the cutting edge 64bit quad core running 32bit Cinebench i decided to clock my 9850BE phenom to 2.7ghz and see what my results were in 64bit vista ultimate with 4gigs of 1066mhz DDR2.

64Bit 32bit
1cpu= 2874 2245 21.88% performance gain
xCpu= 10550 8230 21.99% performance gain
speedup= 3.67 3.67
openGL 4564 4568

Incidently, the 2.66ghz Nehalem got 3048 in single core, and 12,400 i think running all 4 cores. I realize it's based off of results running on a unsupported x58 board...but seeing as how cinebench actually takes advantage of IMC 5.7% lead on a single core and 15% running 4 cores really isn't too impressive for a 45nm chip with twice the on die Cache....while running 1366mhz DDR3. But my how nice it is to see they have already worked their way back up to netburst features and ressurected hyper-threading.

As for the 4ghz clock on the 45nm AMD, it's entirely plausable, even on air cooling. Someone recently managed to break 4ghz with one of the B3 phenoms using phase change i blieve, and my 939 4400x2 toledo core clocked from the stock 2.2 up to 3.66ghz 24/7 stable using a TT Big typhoon with a 120mm 110cfm silverstone fan in place of the stock 54cfm fan, running on 1.475V, which i ran for 2 years until 3.5 weeks ago when i upgraded to my Phenom the highest i managed to boot and get a scuicide screenie was just shy of 3.8ghz though the voltage was pumped up to 1.525 or something insanely high like that.

Now that Dirk meyer is in the CEO seat at AMD, i think things are going to be looking much brighter for them. But then again, AMD has always put placeholder products out while they work on the secret project to wipe the floor with Intel.

This just reinforces the fact that AMD should fire their ENTIRE Marketing department and start all over. Intel has done nothing but screw up time and time again but you would never know it unless you did some READING on your own. AMD messed up once and it nearly ended them. Marketing may be the most important aspect of a tech company's long-term survival.

Wow@Nehalem numbers. WTF happened to that 8-thread power? Maybe it's hyper-threading is as useless as the implementation on Atom, or was SMT turned off in that test? If Deneb comes at it with a solid 15% performance gain over the current K10 then things will get interesting.

[Mechromancer]

Interesting read on PCMark05--

http://arstechnica.com/reviews/hardw...o-review.ars/6

This makes me wonder how many other software manufacturers optimize for certain CPUIDs. Is AMD getting screwed at the end of the day due to poor code? Probably...

[Macadamia]

Wow@Nehalem numbers. WTF happened to that 8-thread power? Maybe it's hyper-threading is as useless as the implementation on Atom, or was SMT turned off in that test? If Deneb comes at it with a solid 15% performance gain over the current K10 then things will get interesting.

There were never really 8 threads. If Dunnington was native and NOT IO limited it would be a lot faster than Nehalem + SMT. Of course, the fans love to inflate scores to absurdity though.

v1: P4


Let's see how v2 will fare.

[Rammsteiner]

This makes me wonder how many other software manufacturers optimize for certain CPUIDs. Is AMD getting screwed at the end of the day due to poor code? Probably...

The issue is that they only tested this with PCMark05... If it was only a problem in PCMark05 it's still a huge and terrible mistake, but well. If PCMark Vantage/3DMark06/3DMark Vantage have this too, then I think something is really really wrong here though.

[RunawayPrisoner]

I would say that Agena is not 10-15% slower than C2Q. It might be closer to half of that, and the difference decreases the higher the frequency goes. That FSB is really killing them. At around 3.5GHz, many tasks seem to be about the same (aka, ~0% avg delta).

I really wish I could say so... but the difference between Q9450 at 3.6GHz and the same processor at 3.8GHz is not a tolerable one. Of course from 3.6GHz to 4.0GHz, it's an even higher gap. There IS a gap, though in stuffs that are already maxed out in terms of performance (simply because C2Q is just too fast), you won't feel a thing.

Plus Agena is up to 25% slower in some media encoding benchmarks. I think Anandtech has one that shows that.

Not to bash AMD... but... rubbing yourself to make it feel better by reducing numbers slowly and slowly is just a bit... weird.

So... what I am trying to say here is... there is no more excuses for Agena. It's a different story about Deneb, though, and I wouldn't even dare guess anything at this stage.

Agena is around 6%-8% slower than Kentsfield C2Q,on average,per clock.This is all with the crappy reviews we have today(using synthetic crap tests which we saw how they benchmark CPUs- ie. PCmark05).
Yorkfield is around 5%-7% over Kentsfield(somewhere more somewhere less).

You can't say those are crap just because they show one processor over another. So what would be a better "benchmark?" Some game that never gets to use more than one core or never uses that much CPU power? If it's so, we might all well get dual-core processors.

Again... no excuses for Agena. It was just plagued with silly mistakes from AMD. Judging from earlier results from Deneb, I am led to believe that the late launch is due to more silly bugs... which I'm leaning towards the software team to blame. Maybe a BIOS issue. Maybe... something else they overlooked while beta-testing. Either way, I believe Deneb will be a hit IF AMD doesn't resort to some crappy software fixes... again.

Wow. it would take me all day to write that lol.. nice to read any how. I do belive AMD has something going on in the back ground.. Plus they have beem very quiet as of late. but either way., I will still buy a Denab Phenom when they come out. It will plug right into my current setup. Nehelam will rquire a hole new board for any Intel users... so total cost wise.. I think I will stick with AMD this go around as well.

I wouldn't pit Deneb against Nehalem. Maybe against Yorkfield, but not against Nehalem. That said, it's not that Nehalem is overpowered against Deneb, but rather... it's not even worthy of being put against Yorkfield, much less Deneb.

I gotta admit... Nehalem is a stupid move from Intel. Kind of like the GTX 200 series from nVidia.