I thought someone disassembled SuperPi on this forum not too long ago, and found out that the performance difference between Intel and AMD chips didn't have as much to do with cache sizes as most people think. The parity came from SuperPi making use of mostly x87 legacy instructions, which are quite a bit faster for whatever reason in Intel chips. Perhaps something else in the chip has changed which is providing the boost, or the added cache is only partly responsible. Maybe someone will leak a run with the cached disabled, or for that matter, a more useful benchmark. SuperPi is such a small program, does it even need to write to L3?
By the way, great forums you guys have here!