Quote Originally Posted by virtualrain View Post
I was perhaps inappropriately comparing Nehalem's theoretical memory bandwidth to C2D's L2 real-world measured bandwidth (which from what I've seen in Everest is under 30GB/s). So my appologies for an apples to oranges comparison.

Is it the RAM modules or the RAM bus that needs to operate at 1.5-1.9V?

At any rate, it's been suggested that the IMC will be on it's own voltage/clock domain which will hopefully allow tweakers to optimize it for stability/performance.
That's what I'm thinking as well. This came up in the Intel will not allow overclocking thread.