Quote Originally Posted by savantu View Post
Umh..the L2 of C2D does 96GBs at 3GHz.

Your point stands however.I don't think that OC memory will give a worthy performance benefit at over 30GBs.Lower latency might be a winner.

On a similar note , I'd expect the Nehalem IMC to be more sensitive to memory and especially voltage.Because it is incorporated into the CPU , it is made with 45nm.That causes problems when linked to higher voltages needed for RAM links ( 1.5V ).Being in the chipset alleviated this problem since chipsets are usually on n-1 or n-2 process tech which matches better the voltages used in RAM.
I was perhaps inappropriately comparing Nehalem's theoretical memory bandwidth to C2D's L2 real-world measured bandwidth (which from what I've seen in Everest is under 30GB/s). So my appologies for an apples to oranges comparison.

Is it the RAM modules or the RAM bus that needs to operate at 1.5-1.9V?

At any rate, it's been suggested that the IMC will be on it's own voltage/clock domain which will hopefully allow tweakers to optimize it for stability/performance.