Quote Originally Posted by SoulsCollective View Post
Some random observations - Edits by Tony in bold

RAM
  • In general, a delay skew was needed, with more delay needed on channel A than channel B. Between 400 and 420 FSB best stability comes from Normal skew on both A and B channels. 420-440 needs a 25ps delay on channel A. 440-470 needed a 50ps delay on channel A and a 25ps delay on channel B, my board won't successfully post at higher than 470 so I can't comment above. I often need 300ps delay for micron and advanced for samsung based dimms.
  • Memtest is useless for testing skew. As long as the RAM will boot, Memtest will run successfully. Best test appears to be a SuperPI run, the longer the better. I don't agree, run test 6 or 7 is catches errors better than test 5 and skew has a profound effect
  • Random reboots at idle is a symptom of bad skew.
  • Performance level and clock twist is limited by both FSB and RAM. My RAM (the approved 2*1GB Corsair XMP1600 CAS-7) is happy to do PL-6 at up to 420FSB, PL-7 at up to 440 and PL-8 at up to 470. Clock twist is less easy to narrow down, I seem to be able to run various settings at various FSB and RAM settings. Not much help I realise. tRD is CAS/FSB strap dependant and how good the NB is, follow the rules for tRD here and play with phase pull in.
  • The P5E3 Prem in general seems happy to run 1T timings at all FSB settings 1N is not 1T, plus its ONLY really good with single rank dimms due to load, I found 2GB dimms need 2N to clock easier but can claw back performance with higher memory clock.

Board
  • vTT (called FSB Term) and vPLL are needed to push high FSB on a quad, with vTT having a greater effect on stability. Between 400 and 420FSB a vTT of 1.2 and a vPLL of 1.6 were needed. Between 420 and 440FSB a vTT of 1.26 and a vPLL of 1.66 were needed. Up to 470 FSB a vTT of 1.3 and a vPLL of 1.7 were needed. I did not feel comfortable running higher voltages than this on a 45nm chip, especially as Intel lists the max safe vTT as 1.35V and many users report killing 45nm chips with vPLL settings of 1.8V. SOUND advice, but PLL at 1.7 will degarde the CPU over a few months heavy testing
  • Setting strap to "Auto" is useless, set it manually. The board does not seem to realise that at a higher FSB setting a higher strap is needed, and instead changes strap according to the RAM speed setting you've selected. 333 strap was stable up to about 440FSB, 400 was needed above 440. Be aware that RAM dividers are linked to strap settings so your RAM OCing may suffer somewhat.Ratio's are linked to strap as is the FSB and tRD, tune the NB GTL's to open the NB's ability to scale FSB
  • Board is quite heat sensitive. Aftermarket cooling or directed airflow is recommended - the X48 chipset has the highest rated TDP of all Intel chipsets at ~35W. Keep it below 48C for high clocks
  • NB voltage appeared to have little affect on results after 1.4V was reached running 2*1GB. This may change at 4*1GB or at FSB speeds above 470.more memory load lowers the ability to add voltage, with 8GB you can not use 1.4V, 1.37 was my max here, 4GB 1.4V was usable but 1.42 was not, 2GB load is best for high memory and high FSB testing as it allows NB voltage to help.


Hope that helps
Added some points I have found with this board, for me this is the benchmark board for all others to follow but you have to know the limits abd be aware different memory loads and the use of quad core CPU's makes a huge difference.