Quote Originally Posted by Pla123 View Post
I'm not going to quote a long post which is located three above mine.
You do know that Core 2 Duo has a shared L2, there is no L2A or L2B just the L2. Of course Core 2 Quad is 2 C2D processors in the same package linked together by the northbridge. C2Q does have 2 L2 caches but Windows will schedule each task to each C2D die, will it not? Which is still useless for a 4 threaded application.

Anyway I think this extract from the Efficient Data Sharing in Intel Core Microarchitecture Based Systems presentation backs you up:

"Frequent modified cache line sharing is bad
• Intentionally – e.g. synchronization
• Mistakenly - False Sharing"

A limitation of MESI?