Quote Originally Posted by flutie98 View Post
The low-K dielectric is used during the metal interconnects as insulation to limit parasitic capacitance between current carrying lines. While the high-k is referring to the material used as the gate dielectric to boost the electric field strength and reduce the needed turn on voltage for the FET
Absolutely correct .... high-k is needed so that the gate oxide can be made thicker at the eqivalent SiO2 capacitance and propogate electric field density into the channel in order to mitigate short channel effects and improve switching speed. The thicker the gate the farther the gate electrode is away from the channel and the direct tunneling leakage is much lower (falls off exponentially).

Low-k is desirable in the dielectric material that supports/separates metal lines that wire up the transistor. Wire delay or sometime called RC delay, is directly proportional to resistance (of the metal lines) and the capacitance generated between adjacent metal lines or frequency max indirectly proportional, however you want to look at it (delay~R*C). To lower the delay choose lower resistance wires (hence the move to copper some years ago, lower resistivity) or lower the capacitance, hence the push to lower dielectric constant (k) for the inter-wire support materials.

Jack