Quote Originally Posted by gtj View Post
Correct. The reference frequency tells the MCH what speed it should assume it's running at and to set its internal timings appropriately. The lower it's set, the lower the MCH latencies. Just like memory, there's a tradeoff between latency, speed, and voltage.
ok, that makes sense, thank you.

And so along that same line of thinking can I assume that 1:2 in 200 will hit a wall before 266, and 266 before 333, etc, as FSB increases? Is this overcome through increased vMCH?

and this all more or less goes back to my issue of not being able to effectively set my multi below 10, and therefore i am trying to maximize bandwidth in other ways.