Sorry for asking a silly question, but how do you get these reading to post like this?Code:CPU Feature - Thermal Management Control: Enabled - PPM(EIST) Mode: Enabled - Limit CPUID MaxVal: Disabled - CIE Function: Auto - Execute Disable Bit: Enabled - Virtualization Technology: Enabled - Core Multi-Processing: Enabled Exist Setup Shutdown: Mode 2 Shutdown after AC Loss: Disabled CLOCK VC0 divider: AUTO CPU Clock Ratio Unlock: Enabled CPU Clock Ratio: 9x - Target CPU Clock: 3600 CPU Clock: 400 Boot Up Clock: AUTO DRAM Speed: 266/667 - Target DRAM Speed: 1000 PCIE Clock: 100MHz PCIE Slot Config: 1X 1X CPU Spread Spectrum: Disabled PCIE Spread Spectrum: Disabled SATA Spread Spectrum: Disabled Voltage Settings CPU VID Control: Auto (This reads 1.29V in CPU-Z under idle) CPU VID Special Add: 107.79% (This reads 1.42V in CPU-Z under load) DRAM Voltage Control: 1.956V SB Core/CPU PLL Voltage: 1.510V NB Core Voltage: 1.330v CPU VTT Voltage: 1.227v Vcore Droop Control: Disabled Clockgen Voltage Control: 3.45v GTL+ Buffers Strength: Strong Host Slew Rate: Weak GTL REF Voltage Control: Enable x CPU GTL1/3 REF Volt: 105 x CPU GTL 0/2 REF Volt: 100 x North Bridge GTL REF Volt: 85 DRAM Timing - Enhance Data transmitting: FAST - Enhance Addressing: FAST - T2 Dispatch: Auto Clock Setting Fine Delay Ch1 Clock Crossing Setting: More Aggressive - DIMM 1 Clock fine delay: Current - DIMM 2 Clock fine delay: Curren - DIMM 1 Control fine delay: Current - DIMM 2 Control fine delay: Current - Ch 1 Command fine delay: Current Ch2 Clock Crossing Setting: More Aggressive - DIMM 3 Clock fine delay: Current - DIMM 4 Clock fine delay: Current - DIMM 3 Control fine delay: Current - DIMM 4 Control fine delay: Current - Ch 2 Command fine delay: Current Ch1Ch2 CommonClock Setting: More Aggressive Ch1 RDCAS GNT-Chip Delay: Auto Ch1 WRCAS GNT-Chip Delay: Auto Ch1 Command to CS Delay: Auto Ch2 RDCAS GNT-Chip Delay: Auto Ch2 WRCAS GNT-Chip Delay: Auto Ch2 Command to CS Delay: Auto CAS Latency Time (tCL): 5 RAS# to CAS# Delay (tRCD): 5 RAS# Precharge (tRP): 5 Precharge Delay (tRAS): 13 All Precharge to Act: AUTO REF to ACT Delay (tRFC): AUTO Performance LVL (Read Delay) (tRD): Auto Read delay phase adjust: Enter Ch1 Read delay phase (4~0): 6-6-6-5 - Channel 1 Phase 0 Pull-In: Enable - Channel 1 Phase 1 Pull-In: AUTO - Channel 1 Phase 2 Pull-In: AUTO - Channel 1 Phase 3 Pull-In: AUTO - Channel 1 Phase 4 Pull-In: AUTO Ch2 Read delay phase (4~0): 6-6-6-5 - Channel 2 Phase 0 Pull-In: Enable - Channel 2 Phase 1 Pull-In: Auto - Channel 2 Phase 2 Pull-In: Auto - Channel 2 Phase 3 Pull-In: Auto - Channel 2 Phase 4 Pull-In: Auto MCH ODT Latency: 1 Write to PRE Delay (tWR): AUTO Rank Write to Read (tWTR): AUTO ACT to ACT Delay (tRRD): AUTO Read to Write Delay (tRDWR): AUTO Ranks Write to Write (tWRWR): AUTO Ranks Read to Read (tRDRD): AUTO Ranks Write to Read (tWRRD): AUTO Read CAS# Precharge (tRTP): AUTO ALL PRE to Refresh: 4



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