[MemoryReaction] G.Skill F2-8000CL5D-4GBPQ - Low in cost, high in speed!

[lefy]

... while memtesting 10 passed test#5 to see where your limit is.

what is this saying? run memtest test#5 with 10 successful passes? so, don't worry about running the other tests while trying to lower subtimings?

It's just how memset reads the timings from the MCH register. It's not a bug in either memset, or the bios, it's simply how the register outputs the timing data.

ah ok. your screenshots from page 1 seem to show it correctly. Is this because we're using different mobos with different MCH registers?

Thanks again... very helpful as always!!

[EnJoY]

what is this saying? run memtest test#5 with 10 successful passes? so, don't worry about running the other tests while trying to lower subtimings?

Sorry, little typo there. Yes, I mean test#5 is really the fastest test to use in memtest that will show you the errors the quickest.

ah ok. your screenshots from page 1 seem to show it correctly. Is this because we're using different mobos with different MCH registers?

Thanks again... very helpful as always!!

No, tWTR in my screen shots was under the same conditions as yours were. In reality, my tWTR was set lower than what was shown in memset, 8 iirc.

[Audioboxer]

Enjoy I have my memory at 1100, with the same timings as you.

The only thing different on my setup is my "performance level" is on 6 in memset by default, and If I try to lower it to 4 like in your screenshot, instant lockup.

I read the performance level is changed depending on what you have your transaction booster setting at in the BIOS?

Was yours at 4, or did you change it?

Thanks

[EnJoY]

Enjoy I have my memory at 1100, with the same timings as you.

The only thing different on my setup is my "performance level" is on 6 in memset by default, and If I try to lower it to 4 like in your screenshot, instant lockup.

I read the performance level is changed depending on what you have your transaction booster setting at in the BIOS?

Was yours at 4, or did you change it?

Thanks

I cannot change that in the bios settings on the IP35 Pro, it was set at 4 in Memset.

[LightSpeed]

just ordered 2x2gb sticks for $99

itl be paired with a e2160 and p5k-pro. heres hoping the e2160 doesnt have low fsb wall

[me3850]

hi there i have one question:
i have asus maximus formula 1004 with G.Skill F2-8000CL5D-4GBPQ but when i try to set fsb higher of 266 cause error on goldmemory test with other memory not have this is problem...i have tried many setting fsb voltage 1.5 nb 1.6 trfc high 60 80...but after 40min the mem cause error... Any of you know how I can resolve? thanks very much

[Leeghoofd]

Try each dimm seperately to test and see if it gives errors then ... could be a DOA....

[me3850]

yes i try but identical error... ok i find the problem is PL it's crazy only way to work at 400fsb(1600) is at disable 7 on bios is crazy poor very poor performance not good memory... ((

[Richard Dower]

Price has dropped again!!...it's now $95 with free shipping:

http://www.newegg.com/Product/Produc...82E16820231145

[GoThr3k]

Enjoy, any updates if you could get the 8500 sticks for a review?

[EnJoY]

Enjoy, any updates if you could get the 8500 sticks for a review?

Nope, I'll have to get on the G.Skill rep about that.

[Big Lar]

Any ideas on this? I can't seem to lower the Performance level any, and am thinking the Fine Delay is too aggressive correct?

CPU Feature Page
Thermal Management Control................Disabled
PPM (EIST) Mode...........................Disabled
Limit CPUID MaxVal........................Disabled
CIE Function..............................Disabled
Execute Disable Bit.......................Enabled
Virtualization Technology.................Disabled
Core Multi-Processing.....................Enabled

Main BIOS Page
Exist Setup Shutdown......................Mode 2
Shutdown After AC Loss....................Enabled
O. C. Fail Retry Counter..................0
CLOCK VC0 Divider.........................Auto
CPU Clock Ratio...........................8.5X
CPU Clock.................................500 MHz
Boot Up Clock.............................Auto
DRAM Speed................................333/667
PCIE Clock................................100 MHz
PCIE Slot Config..........................1X 1X

CPU Spread Spectrum.......................Disabled
PCIE Spread Spectrum......................Disabled
SATA Spread Spectrum......................Disabled

Voltage Setting Page 
CPU VID Control...........................1.31875V
CPU VID Special Add.......................Auto
DRAM Voltage Control......................2.120V
SB Core/CPU PLL Voltage...................1.510V
NB Core Voltage...........................1.517V
CPU VTT Voltage...........................1.119V
VCore Droop Control.......................Enabled
Clockgen Voltage Control..................3.45V
GTL+ Buffers Strength.....................Strong
Host Slew Rate............................Weak
GTL REF Voltage Control...................Enabled
CPU GTL 1/3 REF Volt......................66
CPU GTL 0/2 REF Volt......................66
North Bridge GTL REF Volt ................67

DRAM Timing Page
Enhance Data Transmitting.................Fast
Enhance Addressing........................Fast
T2 Dispatch...............................Enabled
Clock Setting Fine Delay..................Listed Below
CAS Latency Time (tCL)....................5
RAS# to CAS# Delay (tRCD).................5
RAS# Precharge (tRP)......................3
Precharge Delay (tRAS)....................15
All Precharge to Act......................4
REF to ACT Delay (tRFC)...................52
Performance Level.........................8
Read Delay Phase Adjust...................Listed Below
MCH ODT Latency...........................2
Write to PRE Delay (tWR)..................13
Rank Write to Read (tWTR).................11
ACT to ACT Delay (tRRD)...................3
Read to Write Delay (tRDWR)...............8
Ranks Write to Write (tWRWR)..............4
Ranks Read to Read (tRDRD)................5
Ranks Write to Read (tWRRD)...............4
Read CAS# Precharge (tRTP)................3
ALL PRE to Refresh........................4

Read Delay Phase Adjust Page
Channel 1 Phase 0 Pull-In.................Auto
Channel 1 Phase 1 Pull-In.................Auto
Channel 1 Phase 2 Pull-In.................Auto
Channel 1 Phase 3 Pull-In.................Auto
Channel 1 Phase 4 Pull-In.................Auto

Channel 2 Phase 0 Pull-In.................Auto
Channel 2 Phase 1 Pull-In.................Auto
Channel 2 Phase 2 Pull-In.................Auto
Channel 2 Phase 3 Pull-In.................Auto
Channel 2 Phase 4 Pull-In.................Auto

Clock Setting Fine Delay Page
Ch1 Clock Crossing Setting................More Aggressive
DIMM 1 Clock fine delay...................Current 12ps
DIMM 2 Clock fine delay...................Current 662ps
DIMM 1 Control fine delay.................Current 600ps
DIMM 2 Control fine delay.................Current 600ps
Ch 1 Command fine delay...................Current 1062ps

Ch2 Clock Crossing Setting................More Aggressive
DIMM 3 Clock fine delay...................Current 1386ps
DIMM 4 Clock fine delay...................Current 424ps
DIMM 3 Control fine delay.................Current 374ps
DIMM 4 Control fine delay.................Current 212ps
Ch 2 Command fine delay...................Current 1112ps

Ch1Ch2 CommonClock Setting................More Aggressive

Ch1 RDCAS GNT-Chip Delay..................Auto
Ch1 WRCAS GNT-Chip Delay..................Auto
Ch1 Command to CS Delay...................Auto

Ch2 RDCAS GNT-Chip Delay..................Auto
Ch2 WRCAS GNT-Chip Delay..................Auto
Ch2 Command to CS Delay...................Auto

Larry

[KTE]

I read the performance level is changed depending on what you have your transaction booster setting at in the BIOS?

At stock volts, it depends on the FSB you boot at. Boot at <-335FSB and you should have PL4.

PL isn't about RAM but about the chipset, so it's stability is chipset dependent.

[TEDY]

just tested them today at 550

super pi 32mb passed just fine.

[EnJoY]

just tested them today at 550

super pi 32mb passed just fine.

Screen shots? Keep pushing!

[TEDY]

560 2.15v



tried 565 at those settings...blue screen

[Spyrus]

More votage or tRFC >52

[TEDY]

you think? i tried 2.2v trfc lover then 52?

[blazin-asian]

oh man, just read all 19 pages of this thread and great review

the highest i can get on my mem is 540 MHz @ 5-5-5-15 with 2.0-2.1v, but i only did quick test of 5 passes of memtest test #5.

i am not too concerned about max speed, since they will be running under spec anyways. now im trying to tighten my timings.

the lowest i can go so far without memtest errors is 5-5-3-15 with trfc=55 (passed memtest #5 10 times)

i tried 2.1v, but cant go any lower.
ive also tried 5-4-3-15 and 5-4-3-20 from 2.0-2.1v, but i get errors.

my current OC right now is 9x389 on my Q6600 with mem @ 467MHz (333/800 divider)

any suggestions on how i can get the timings tighter?

thanks!

btw, i got my kit last week from newegg for $99 shipped. they dropped about $5 a couple days ago and i was a little upset, but now they are back up to $150 so i am happy again

[Spyrus]

5-5-4-13 is a suggested solution though for high clocks @ 5-5-5-15
the difference is not noticeable only in benchs

[blazin-asian]

5-5-4-13 is a suggested solution though for high clocks @ 5-5-5-15
the difference is not noticeable only in benchs

sorry for the dumb question, but would tighter timings allow for higher memory bandwidth?

thanks

[Spyrus]

Yes but mostly CAS and RAS TO CAS meaning 4-4-x-x vs 5-5-x-x

[GoThr3k]

i bought one kit of these, only 82€
damn they are getting cheap

will posts results as soon as my mobo and cpu are in

[truehighroller]

This is what I am able to get out of my G-Skill DDR2 PC8500 2X 2Gb kit


I don't know what the statis tread phaze adjust means in my bios though,,?

[Spyrus]

tRFC is very tight try 47-52
Write To Precharge (11) is tWR = 3 in bios too tight set it to 6.