Yeah those p-states are great for tweaking, running with one HD and 3xFans atm.
CPU 2.6 (217x12) at 1.3V CPU VID
NB 2.17 (217x10) at 1.3V NB VID
MEM 578MHZ at 2.25V
idle: 157W AC
load: 270W AC
CPU .8 (217x4) at 1V CPU VID
NB 2.17 (217x10) at 1.3V NB VID
MEM 578MHZ at 2.25V
idle: 139W AC
load: 180W AC
Lowest possible consumption is cpu 200x4 at 0.9V nb 200x9 at 0.95V. In idle ~105W AC. So the board still needs more tweaking to beome more efficient.
A note aboute the NB multi. If CnQ is set to Auto in the Bios, the NB multi is always 9x. So it's required to up the ref HT to tune the nb.
However with above scripts it's possible to set the p-states and switch between em manual. Those work with CnQ disabled in bios.
A third p-state would be great, i'd like to have a low normal and high p-state.
Is 2.6GHz stable at 1.225V VID?
The predefined p-states differ in the CPU DID and have the same CPU FID, can be it's faster to switch between the modes if only the DID changes.
NB DID must be equal on all cores's and p-states, no way to change the nb speed on the fly.
Have you played with IddValue/IddDiv? I assume it can be used to define under which load the 0 p-state get's used.
Do you know a stress-utility which can generate stress in steps? Maybe sandras energy efficiency test shows a difference.
It's like i expected. calibrated against the worst case temp with arbitrary scaling.
Looking at the MSR registers HTC seems to be an feature of future steppings.
In terms of temps i rely on the external sensor on the mobo. This one reports the highest temps. The avreage is +10° over CPU temp. A probe next to the prozessor reads the same temps as the cpu sensor most of the time, so i assume this temp is actualy higher.
Skimmed over the whole thing one time, just to get an outline and know where to look for what. Alot of extra research is required on my side to read that doc.






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