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Thread: coldbug

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  1. #1
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    Quote Originally Posted by KTE View Post
    Can never be sure, but that's what the signs around now show. SOI.
    If SOI is broken, why can Power hit 5ghz with seemingly no problems?

    I've got no idea why AMD are having process issues but if IBM can get SOI to 5+ghz then it seems to me that isn't the problem.
    Although I can't recall if IBM are using high K.

  2. #2
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    dino i kinda disproved the high htt theory on manta......350 x 4 multi.......and 300 x 5 multi..........
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  3. #3
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    Quote Originally Posted by chew* View Post
    dino i kinda disproved the high htt theory on manta......350 x 4 multi.......and 300 x 5 multi..........
    BH chips were known not to coldbug at all chew*
    you know that S7 did a lot of work on this and could not cold bug those sons of es even at -95C or whatever the temp was again
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  4. #4
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    I know, remember I started the thread on them but if we compare a BH chip not known to coldbug to a non BH chip............I bet saaya could figure it out....
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  5. #5
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    Quote Originally Posted by Aussie FX View Post
    If SOI is broken, why can Power hit 5ghz with seemingly no problems?

    I've got no idea why AMD are having process issues but if IBM can get SOI to 5+ghz then it seems to me that isn't the problem.
    Although I can't recall if IBM are using high K.
    IDK about that chips design and material selection because I haven't studied it, never needed to, so I can't speak for that and each IC is very different despite it using the same design process. However SOI isn't broken in itself, but it does have material and implementational limitations with the current properties of the chemicals used in K10. They can enhance these properties and get far lower current leakage in the "on" and "off" states, higher drive current and better transistor performance throughout, which will give you better MHz at lower power/temps/volts idle and load. One of these methods is to employ a relatively thin high-k dialectric/metal gate CMOS which is exactly what they've been working on with IBM and for the above specified reason.

    There's a two things:
    a) a design/material frequency and current limit
    b) something which causes coldbugs

    The first you can't address, only AMD can.
    The second you maybe can address.. if you knew what it was. (hence the thread)

    And yeah saaya, what you said is true. As it gets colder, there is much less resistance and more voltage actually gets to the cores, which also affects current leakage as it decreases drastically and more is then provided to the cores. There is a massive difference with the amount of current leakage in cold/hot temps, like 40x at 50C compared to 0C, if not more.

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