Frankly, almost every errata this publicized is overblown be it Intel or AMD that is affected. Even the FDIV bug in the pentium so many years ago was given more importance than needed. The problem is the psychological affects that people take away of 'this is a defective CPU', many times forgetting that both AMD and Intel document dozens to hundreds of odd bugs that rarely if ever occur.
AMD did the right thing by stopping any Barcelona/Opteron going into enterprise systems given the nature of the bug and the importance data centers put on up-time and stability, on DT (most of what people here are interested in), the TLB errata may or may not express itself, if it does the frequency is most probably not high enough to ever notice as lock ups, BSOD, etc. all simply occur on occasion be it from a CPU errata, a bad driver, or poor microsoft OS code... we all deal with the occasional lockup etc. If the errata were occuring every 2 hours, it is a problem, if it occurs every 2 months... would anyone notice (most definitely not).
The rigors that both Intel and AMD put the CPU through before launch should bolster confidence that under normal operations the processor will function just fine.... that is not that they should not fix errata as they become known, most certainly the most problematic ones need to be fixed -- and they are usually in future steppings, however, most errata are so minior or not typically observed with commercial software that though it is documented, both AMD and Intel simply to not plan to fix it ... there is really no need.
The severity of the TLB errata is much more in the bad PR it has generated than any problematic build one might assemble. I personally will wait for B3 before considering a Phenom build, part of it is the TLB, I prefer to have it not there -- but they will also fix other bugs as well, which for a first rev I would rather wait.
Jack







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