AMD prepares three-core processors

[adamsleath]

Now, if they are super-constrained on QC *supply*, then it makes sense.

isnt that the only reason for discussing tricores at all.?
obviously phenomx4 yields will be low to start; as with all new processes.
if amd had 'good' x4 yields i doubt this thread would exist.

why complain about having more products in the market? the more choices offered to consumers the better.

many people continue to buy dual and even single cores.
quad cores are NOT mainstream sellers ->yet.
tricores could be another niche below quad cores and should/could increase sales in the mainstream market....and yeah they may hinder quad core sales...they could be a transition thing; tricores might not even eventuate. i'd rather have more choices.

[terrace215]

obviously phenomx4 yields will be low to start; as with all new processes.

The process isn't new, nor are low yields a function of all new processes. (Think non-AMD processes here. )

The problem is a function of the very large monolithic die together with a seemingly mediocre defect density (so large numbers of parts have at least 1 completely defective core) and what seems to be a lot of small scale variation in AMD's 65nm process (meaning that neighboring cores, even on the same die, are sometimes (often?) quite different from each other in terms of speed and power bin, which creates a huge binning problem for QC parts, as the lowest bin core "wins", and any high-leakage cores drive up the overall TDP).

[Donnie27]

The process isn't new, nor are low yields a function of all new processes. (Think non-AMD processes here. )

The problem is a function of the very large monolithic die together with a seemingly mediocre defect density (so large numbers of parts have at least 1 completely defective core) and what seems to be a lot of small scale variation in AMD's 65nm process (meaning that neighboring cores, even on the same die, are sometimes (often?) quite different from each other in terms of speed and power bin, which creates a huge binning problem for QC parts, as the lowest bin core "wins", and any high-leakage cores drive up the overall TDP).

QFT! on this one and #111

[DeepThought86]

Wow, 4 pages of argument because AMD is planning to introduce an intermediate bin product, same as CPU and GPU manufacturers have been doing for years!

I guess the reason some people can't learn from history is because when you're 16 years old there is no history to refer to...

[adamsleath]

The process isn't new, nor are low yields a function of all new processes. (Think non-AMD processes here. )

The problem is a function of the very large monolithic die together with a seemingly mediocre defect density (so large numbers of parts have at least 1 completely defective core) and what seems to be a lot of small scale variation in AMD's 65nm process (meaning that neighboring cores, even on the same die, are sometimes (often?) quite different from each other in terms of speed and power bin, which creates a huge binning problem for QC parts, as the lowest bin core "wins", and any high-leakage cores drive up the overall TDP).

isnt that what i said?

the proportion of higher clocking chips is always smaller than the rest, and yields increase over time usually as more and more chips are produced and new steppings are introduced.

if not tricore then ill have to wait for amd to iron out their fab of x4's.
thx again.

[terrace215]

isnt that what i said?

No.

[zakelwe]

Assuming that 3 cores are handled well by software I don't see what the issue is, it gives more choice and surely that is never a bad thing? Do people complain BWM do 4, 6, 8 and 10 cylinder engines rather than just 4 and 8?

I guess this makes the future naming convention even more confusing though

I guess in the dual socket boards you could have the following number of cores - 2, 3 , 4, 5, 6, 7 and 8 . Or maybe not.

Regards

Andy

[evoic]

We live in a world that ripped open their wallets to buy pet rocks and Chia pets.

No one ever said that it had to make perfect sense to the masses in order to be consumed by them at clips of a thousand per day.

At first I thought of all the possibilities of why AMD shouldn't do this and how ridiculous it would potentially be.

After thinking it over......digesting some of the posts.....and considering the information presented - I'm starting to think it could be a minor saving grace for a company that could definitely use a minor saving grace or two.