The K10 stepping fiasco

[GoThr3k]

http://www.fudzilla.com/index.php?op...=3049&Itemid=1

http://www.fudzilla.com/index.php?op...=3050&Itemid=1

would explain a lot....

The errata fix wouldn't improve the performance. A new stepping(Cx) with a circuit redesign would be required to boost the performance.
Having the 2M L3 between the RAM and the L2 cache, a 5% performance improvement in average would be quite impressive.
IMO 10% IPC improvement with 50% faster RAM is impossible(I consider specFP_rate, Sandra memory bandwidth and such as useless benchmarks that doesn't represent processor performance ).
For real-world, lets take the s939 as example. It has twice the bandwidth of s754, but it is up to 5% faster. Even s939 with 1MB L2 and CL2 vs s754 512kB CL3 doesn't improve the performance for 10% in average.

if you are talking single core, you are correct
S939 not a big boost over S754
if you talk about multicores,you are wrong.....