No he clarified himself later.He meant as if the chip was at 80% of it's efficiency at 2Ghz(due to many constraints,some he mentioned to be ES releated-IMC,HT speeds etc.;some are BIOS related).
After chip gets all of its parts above 2.4GHz(IMC and L3),the rest of the core starts to act the way it was designed(optimal throughput in the appropriate sections)
And all of this was with EVTs and early BIOSes.He also said they saw week to week improvement with new ES and boards(this tells a lot about the samples they had and about the bios support)
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