I think you must have missed my earlier response to this, but it's worth repeating...
Note that what I highlighted above may be misleading. The only thing your math proved was that CoreTemp was in fact using 100C as it's Tjunction reference value - not that 100C is the value it is supposed to be using for this stepping.
But we already knew that it was using 100C, because it was listed on the window. The question at hand is whether or not 100C is the proper value. Note that Tjunction is not a register on the chip that CoreTemp can simply read to find out. It's basically looking to see which cpu is being used and using a hard-coded value, depending on whether it's a mobile, conroe-duo, allendale, quad, etc.
So, until Intel verifies what value should be used, we just can't be certain that 100C is correct.
What makes me think it's changed for the G0 stepping? Here's my reasoning...
1. Temperatures being reported for the new E6x50s are way off - obviously 85C is no longer the proper Tjunction value to be used for those.
2. If you look at the Intel alert/notice about the stepping change for this particular cpu (Q6600), you'll see the following:
...also note that 'Tjunction' is also (and perhaps more properly) known as 'maximum Tcase value'. So, what Intel did with this stepping (in addition to some optimizations that allow lower overall voltages) was to "let the cpu get 11C hotter, before cranking up the cpu fan (and/or throttling itself)". This leads me to believe that the Tjunction value was also increased - maybe by 11C, but possibly by some other number.Tcase for the Intel® Core™2 Quad processor Q6600 and Intel® Xeon® processors X3220 and X3210 on G-0 stepping has been increased by 11 oC. Tcontrol offset will remain the same relative to increase in Tcase which will help reduce acoustics
I'd also note that (at least speaking for myself), there is some confusion/ambiguity about how all of these values relate to each other... Tcase, for example, is (as far as I know) the temperature probe in the center of all cores and is the one that the BIOS and most apps report as 'cpu' temperature, but the way the above is worded, they seem to be specifically talking about 'Tjunction' (or TcaseMax)... they've obviously increased the top-end value of the allowable temperature range.
Given all of the above, I think it's a fairly safe assumption that the 'proper' Tjunction value to use for a G0 stepping Q6600 is 111C - but we really just won't know until Intel shares this information one way or the other (the only thing they've said for certain so far is that the mobile cpus use 100C - at least at the time they said that).
So basically, I don't think we can say for sure what the core temperatures truely are, but for practical/discussion purposes, using CoreTemp's numbers is as good as anything else until/unless some clarification comes from someone who really knows. As mentioned earlier, the only truley meaningfull measurement is whether or not your system is stable at some given speed. If it is (and the voltage you're feeding it is not dangerously high), then it doesn't really matter what the temperature is.
That being the case, the more meaningful number that CoreTemp can give you is the actual DTS value (enable the "Show Delta to Tjunction" option). This tells you how much headroom you have left - regardless of what all the various temperatures are reading. XT showed this @idle earlier, but idle temps never have interested me... I'd like to see some DTS values for some of these overclocks while under load.




. The question at hand is whether or not 100C is the proper value. Note that Tjunction is not a register on the chip that CoreTemp can simply read to find out. It's basically looking to see which cpu is being used and using a hard-coded value, depending on whether it's a mobile, conroe-duo, allendale, quad, etc.
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