Official AMD Barcelona Thread

[Lightman]

AMD noted that the memory controler will be clocked a lil' higher than the core it self. That may have something to do with it.

Yes, but memory controller is connected with L3 cache (same power plane), not L2...

[Periander6]

This theory is in conjunction with what Groo and some other people was saying... Demoed K10 is cripped... It's not fully working part!

Wierd, cause exactly one month ago Groo was reporting that the B0 stepping had come back and resulted in a "massive gain in frequency", that as a result we could expect 2.9 GHz quads at launch, and that they were 'dancing in the aisles' over at AMD.

Now Groo says that same B0 is "so broken" and so full of "bugs and more bugs" that any benchies taken of it should be disregarded as worthless. Methinks he needs to go back to AMD marketing and tell them to straighten out what story he's going to be peddling next week.

[SEA]

This theory is in conjunction with what Groo and some other people was saying... Demoed K10 is cripped... It's not fully working part!

No need in any theory - it is known that those were engineering parts.
It even could not be other way.

The Barcelona servers at Computex are all running engineering samples of the chip that were provided to help server makers build their systems.

[red]

http://www.theinquirer.net/default.aspx?article=40181

AMD puts out Phenom teaser

Anyone know anything that is happening on June 10th in Montreal?
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I didn't get the hint from the INQ the first time, apparently Formula 1 racing. Why not May 13th in Barcelona though

[EvlUndrWareNome]

sounds like the quad phenoms are going to be very pricey.... right around when intel drops prices on their quads... i do hope amd builds a reasonably and competitively priced quad chip.

[Zytek_Fan]

http://www.theinquirer.net/default.aspx?article=40181

AMD puts out Phenom teaser

Anyone know anything that is happening on June 10th in Montreal?
---
I didn't get the hint from the INQ the first time, apparently Formula 1 racing. Why not May 13th in Barcelona though

As I said in the news thread for the teaser, if Barcelona launches Sunday, then AMD has been sandbagging Barcelona all along. Which means there is no problem with the chips (if they were having problems why would they launch it Sunday?)

[tictac]

That definitely validates these screenshots.

Yepp....

Check this out:

http://xtremesystems.org/forums/show...6&postcount=36

[nemrod]

As I said in the news thread for the teaser, if Barcelona launches Sunday, then AMD has been sandbagging Barcelona all along. Which means there is no problem with the chips (if they were having problems why would they launch it Sunday?)

Perhaps we should wait before speculate... if they were having no problems why they miss the computex for an obscur launch 3 days latter? This few day difference would have allow to intel to developp a new architecture in response?

[madcho]

Perhaps we should wait before speculate... if they were having no problems why they miss the computex for an obscur launch 3 days latter? This few day difference would have allow to intel to developp a new architecture in response?

AMD want make big shows, they want to be the only one on the spot ligts, in the computex show evrey body is under spot lights.

maybe a idf like at montreal sunday with Barcelona. I'm asking myself why AMD cut the opteron prices if K10 is not on time ?

maybe it's a soft lunch and the cpu will be available on jully

[Shintai]

Yes, but memory controller is connected with L3 cache (same power plane), not L2...

The software could easily be wrong.

[Sumanji]

Has AMD ever sandbagged before (like at K8 launch)?

It's just wishful thinking (even on my part ) to expect K10 desktop to make an appearance before Christmas...

Suman

[Motiv]

Just wondered, if 1.6gz is doing the rounds. How would that translate to the POV results?

Wouldn't that translate quite well?

All speculation ofc.

[alfaunits]

The POV results were ran at the same current vs Barcelona generation Opterons speed (i.e. Opty @ 1.6 and barcelona @ 1.6 or both @ 2.0 - doesn't matter which one, it still puts the barcelona in the slower-than-K8 ranks).

[nn_step]

The POV results were ran at the same current vs Barcelona generation Opterons speed (i.e. Opty @ 1.6 and barcelona @ 1.6 or both @ 2.0 - doesn't matter which one, it still puts the barcelona in the slower-than-K8 ranks).

well one would assume after 3 years and one of the worlds best design teams, they would be able to improve performance atleast slightly

[madcho]

Barcelona is not delayed, AMD lunatic information formally, Barcelona is for this summer.

source ( french )

[tictac]

4socket barcelona:

LinK:
http://badhardware.blogspot.com/

[RaZz!]

4socket barcelona:

LinK:
http://badhardware.blogspot.com/

looks sexy!

[nemrod]

There is still something, I don't understand... What is Budapest?
Is it a specific version for cray? Or is it the desktop version of the barcelona?

Barcelona is a strategically important chip for AMD, as it tries to regain market share lost to Intel's newer Core 2-based Xeon server processors, the dual-core 5100 and the quad-core 5300.

However, Budapest shipments to Cray slipped. "Specific to Cray, we did have a change in our schedule, as far as when Cray gets Budapest parts," Hughes said, declining to share further specifics.

Barcelona is designed for systems with two or more processor sockets, but Budapest is for single-socket systems.

[red]

Budapest is single socket with HT3.

[madcho]

There is still something, I don't understand... What is Budapest?
Is it a specific version for cray? Or is it the desktop version of the barcelona?

it's opteron K10 for AM2+ with HT3. Budapest is used by cray

[Shintai]

I still find it wierd that Cray want to buy single socket Opterons and not MP sockets.

[madcho]

I still find it wierd that Cray want to buy single socket Opterons and not MP sockets.

maybe budapest is mutli P able, and cray want HT3

[nemrod]

And the barcelona hasn't HT3?
Why MP are ready and single socket not? I would have think that MP processors are more difficult to realize?

[madcho]

And the barcelona hasn't HT3?
Why MP are ready and single socket not? I would have think that MP processors are more difficult to realize?

They are same

[Lightman]

Hint as of when NDA on Barcelona will be lifted!

At the CTO Summit, AMD laid out a fully finished 300mm wafer to touch and photograph, and we were shown specifics on the fab rollout schedule for AMD’s 45nm process. We got an advance look at new AMD/ATI chip-set technology as well, along with a completely new and radical AMD CPU, the nondisclosures on which lift this month. AMD is not running behind Intel. It is simply not practicing reactive engineering, and if you pay attention, you’ll see that AMD’s take on 45nm process, 300mm wafers, desktop chip sets, and dual-core mobile architecture are more than mere snapshots of the marketed leading edge, which is a coat of gloss on the present. AMD, through its partnership with IBM, defines the leading edge. Watch.

Source