No, you clearly do not understand the technology behind memory latency and bandwith.
For example, 2200 MHz CL9 memory has a lower access latency than one with 1000 MHz CL4 - and a MUCH higher bandwith.
Effective memory latency cannot be reduced much further with the currently used memory module design (meaning the phyical modular concept far away from the memory controller).
But it is possible to increase bandwith.





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