...you forgot that AM2+ combined with K10 will support channel interleaving. Two indepenedent memory controllers will allow for better command efficiency, lower loaded latency, and concurrent reads and writes. See post # 99.
Just because the memory slots aren't pin compatible, doesn't mean the IMC cannot support both architectures. The lack of pin compatibility only means the supported memory standard would be determined by the motherboard.
But to answer your question, it no longer seems like AM3 CPUs will be backward compatible:
http://www.dailytech.com/AMD+45nm+DD...rticle7132.htmPrevious AMD documentation indicated that AM2 and AM3 would be forward/backward compatible -- yet AMD engineers claim the AM3 alluded to in 2006 is not the same AM3 referenced in the 2008 launch schedule.
"At the time AM3 was the likely candidate to become AM2+," claimed one field application engineer familiar with AMD's socket migration. "[AMD] wanted to keep the socket name associated with DDR2 memory and backwards compatibility, but AM3 emphasizes DDR3 support."
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