Quote Originally Posted by Dresdenboy
http://www.hkepc.com/bbs/itnews.php?...me=0&endtime=0

Increasing memory bandwidth for QC has much more significant effects than it has for DC or even SC. Just think of FSB contention in tasks, which can't make efficient use of the caches thanks to huge datasets. I think, with optimized handling of mem accesses (maybe even with prefetching by the chipset itself), DDR3 and the higher FSB bandwidth you could see double digit improvements as they claim. Except maybe for Cinema4D and other apps/benches running nicely in the caches
If you're the same guy who posts at Aces , you definetly sound more knowledgeable there.