thats what i have posted over in the abit aw9d-max forum to clear things up:

Case Temperature
intel thermal specs always references a case temperature (TC). this TC is defined as the temperature measured at the geometric center of the package on the surface of the IHS.

X6800 TC = 60,4C
C2D with 4MB L2 cache TC = 60,1C
C2D with 2MB L2 cache TC = 61,4C


PROCHOT#
the system bus signal PROCHOT# will go active when the processor temperature of either core exceeds its maximum operating temperature. this indicates the Thermal Control Circuit (TCC) has been activated. the temperature at which the PROCHOT# signal goes active is individually calibrated during manufacturing. once configured, the processor temperature at which the PROCHOT# signal is asserted is not re-configurable.


THERMTRIP#
the processor will automatically shut down when the silicon temperature has reached its operating limit. at this point the system bus signal THERMTRIP# goes active and power must be removed from the processor. the temperature where the THERMTRIP# signal goes active is individually calibrated during manufacturing. once configured, the temperature at which the THERMTRIP# signal is asserted is neither re-configurable nor accessible to the system.


Digital Thermal Sensor
the Digital Thermal Sensor (DTS) is the on-die sensor to be used for fan speed control (FSC). each core has its own DTS. the DTS is monitoring the same sensor that activates the TCC. readings from the DTS are relative to the activation of the TCC. the DTS value where TCC activation occurs is 0 (zero).


Core Temp
as far as i know, thats the point where core temp kicks in. core temp just reads two registers. the first one is the one which holds the temperature where TCC gets activated, the second one is the register holding the DTS value itself. all what core temp has to do, is subtract the DTS value from TCC activation temperatur to get current core temperatures. as i understand, core temp displays the TCC activation temperature as "Tjunction" and the actual temps of both cores under "Core #0" and "Core #1".


thats how i understand this after reading intel C2D processor specs, intel C2D thermal guidelines and core temp description ...

so, as long as TCC is not activated (the cpu is not throttling) temps are below the 85C core temps shows as "Tjunction". i guess throttling could also be seen within cpu-z as reduced clockrate. have not yet tested this, anybody seen this already?
in this case we safely can assume TAT is wrong. somebody mentioned already, TAT was not written for this processors. it is a tool designed to test mobile cpu's. as this temps are read from registers, it's likely TAT reads the wrong register ...