More P5B secrets uncovered

[fscussel]

I think the answer to this question is fairly obvious: the strap changes based on the NBCC, not the FSB.

How do we know this? Well, the NBCC is set when the system boots....when the default multiplier is detected, when the BSEL pins report the current default strap for the detected CPU, and when the currently selected multiplier (via BIOS) is set.

This in turn determines the correct strap for the NBCC which forces the setting of associated MCH latencies. The only other way to change the strap, insofar, once the system is running is to change the multiplier in Windows (CrystalCPU, C2MM, etc.). Simply changing the FSB (ClockGen, SetFSB, etc.) causes the FSB to increase - raising the overall NBCC overclock and raising final DDR2 speeds - but does not modify the strap/associated latencies.

Bachus has shown this simply by booting at 400FSB, entering windows and using ClockGen to change to 410FSB....he then achieved a 43 second drop in SPI 32m over booting straight in at 410FSB!

Since Bachus is using an E6600 with a multiplier of 8x:

(9/8)*400 = 450MHz NBCC w/400Mhz FSB (1066 strap?)
(9/8)*410 = ~461Mhz NBCC w/410MHz FSB (1333 strap?)

but...

(9/8)*400 = 450Mhz NBCC w/ClockGen to 410 FSB yielded the 43s drop in SPI 32m...

I think we can probably assume that one of the inflection points for setting the next higher strap on the Asus P5B Deluxe is in the 450 - 461MHz range.

-FCG

hummm I tought that the strap change was occuring between 399 to 400, because there's a huge change when people using the default multi of the processor cross that limit...

so with an E6400:

8/8 = 1 x 399 = 399 NBCC
8/8 = 1 x 400 = 400 NBCC = strap change

EDIT: I see, probably there's a change in 399 to 400 and another change between 450-460... so everything is correct...