Ok great... we needed this.. but as you said that channel a + b have to be the same... cant you edit so when setting something it will occur on both channels?
that is a little bit easyer
Ok great... we needed this.. but as you said that channel a + b have to be the same... cant you edit so when setting something it will occur on both channels?
that is a little bit easyer
*EDITed by IFMU*
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Beta67-> for Pat some bits are Read/Write,but some bits are Read Only,
and I can't change them.
For Dram Idle Timer,I add it in a next version.
Last edited by FELIX; 03-27-2006 at 11:55 AM.
Thx for this GREAT tweaker felix, i really like it
I did some testing with 2x512mb crucial ballistix pc3200 (micron 5B G) and a p4p800se (i865), I tested the effects of CpC and Read delay. The txt is in the attachment
HiOriginally Posted by FELIX
I guess the idea of tweaking PAT is out of the window, never mind. It's a shame there is no way to edit/mod the BIOS *.rom file to eneable PAT over 200Mhz FSB before flashing. Thanks for looking into the DRAM Idle timer options. Im looking forward to see what is in store for us with the version.
Keep up the good work Felix
Johnny Bravo
The first post of this thread was edited on the 21-3-2006 on that day Felix updated the version of his Memset. Download it and see the difference, the newer version has even more things to play with
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