AMD Says That K10 Problems Will Only Be Cured by K11

[savantu]

Thanks for replying.



Could you elaborate on what problems?

I'm just a hobbiest with a interest in the technology and my limited knowledge is gleaned mainly from picking out those who know what their actually talking about in various forums and firing off the odd question. From that what I gather is immersion lithography is essential by the 32nm node so in utilizing it with the current node AMD/IBM is if anything benefiting for the additional experience gained.

True.Using 45nm immersion means they gather experience for the 32nm transition.

Intel OTOH used dry at 45nm allowing maximum capital reuse from 65nm.The downside was they needed double patterning which cut FAB output ( see shortages of Penryns ; this will be solved as more FABs come online - Intel plans 4 45nm FABs ).

But it won't be easy either for AMD/IBM at 32nm.Why ? Because they will change from low-k SOI to high-k/metal bulk SOI.
I'd say it is more difficult to change the process than the tools ( since there are a few tool makers , Nikon , Canon , ASML ).Basically , the tools are the same for all , what matters is the process.

While it can produce lower yeilds relative to dry lithography again, from what I've read, AMD are actually doing very well in this regard. In contrast there have been yield issues suggested at Intel's reliance of dry double patterning. I know in Australia at least availablity for Penryns have until very recently been light on the ground and generally above list price.

Intel shipped 10 million 45nm CPUs in less than 6 months.While not many , they expect to crossover 65nm by Q3.If accomplished the ramp will be excellent , in line with former transitions.